Xilinx VCU110, User Manual

Page: 35 / 156

VCU110 Evaluation Board www.xilinx.com 35
UG1073 (v1.2) March 26, 2016
Chapter 1: VCU110 Evaluation Board Features
USB JTAG Interface
[ Figure 1-2 , callout 9]
JTAG configuration is provided through a Digilent onboard USB-to-JTAG configuration
logic module (U115) where a host computer accesses the VCU110 board JTAG chain
through a type-A (host side) to micro-B (VCU110 board side) USB cable.
A 2 mm JTAG header (J3) is also provided in parallel for access by Xilinx download cables
such as the Platform Cable USB II and the Parallel Cable IV. JTAG initiated configuration
takes priority over the configuration method selected through the FPGA mode pins M[2:0],
wired to SW16 positions [1:3].
The JTAG chain of the VCU110 board is illustrated in Figure 1-7 .
For more details about the Digilent USB JTAG module, see [Ref 25] .
X-Ref Target - Figure 1-7
Figure 1-7: JTAG Chain Block Diagram
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