Xilinx VCU110, User Manual

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VCU110 Evaluation Board www.xilinx.com 55
UG1073 (v1.2) March 26, 2016
Chapter 1: VCU110 Evaluation Board Features
Table 1-20: VCU110 FPGA U1 GTY Quad 128 Connections
FPGA (U1) Pin Name
FPGA
(U1) Pin
Schematic Net Name
(1)
Connected
Pin Number
Connected
Pin Name
Connected
Device
MGTYTXP0_128 W40 CFP4_MOD3_TX3_P 54 TX3P--TX0P
CFP4
MOD3
J110
MGTYTXN0_128 W41 CFP4_MOD3_TX3_N 55 TX3N--TX0N
MGTYRXP0_128 W45 CFP4_MOD3_RX3_P 39 RX3P--RX3N
MGTYRXN0_128 W46 CFP4_MOD3_RX3_N 40 RX3N--RX3P
MGTYTXP1_128 V38 CFP4_MOD3_TX2_P 51 TX2P--TX1P
MGTYTXN1_128 V39 CFP4_MOD3_TX2_N 52 TX2N--TX1N
MGTYRXP1_128 V43 CFP4_MOD3_RX2_P 36 RX2P--RX2N
MGTYRXN1_128 V44 CFP4_MOD3_RX2_N 37 RX2N--RX2P
MGTYTXP2_128 U40 CFP4_MOD3_TX1_P 48 TX1P--TX2P
MGTYTXN2_128 U41 CFP4_MOD3_TX1_N 49 TX1N--TX2N
MGTYRXP2_128 U45 CFP4_MOD3_RX1_P 33 RX1P--RX1N
MGTYRXN2_128 U46 CFP4_MOD3_RX1_N 34 RX1N--RX1P
MGTYTXP3_128 T38 CFP4_MOD3_TX0_P 45 TX0P--TX3P
MGTYTXN3_128 T39 CFP4_MOD3_TX0_N 46 TX0N--TX3N
MGTYRXP3_128 T43 CFP4_MOD3_RX0_P 30 RX0N--RX0P
MGTYRXN3_128 T44 CFP4_MOD3_RX0_N 31 RX0P--RX0N
MGTREFCLK0P_128 W36 CFP4_SI5328_OUT1_BUF4_C_P
(2)
28 CKOUT1_P
SI5328
U179
MGTREFCLK0N_128 W37 CFP4_SI5328_OUT1_BUF4_C_N
(2)
29 CKOUT1_N
MGTREFCLK1P_128 V34 CFP4_REC_CLOCK2_C_P(1) 12 CKIN2_P
SI5328
U179
MGTREFCLK1N_128 V35 CFP4_REC_CLOCK2_C_N(1) 13 CKIN2_N
Notes:
1. MGT connections I/O standard not applicable
2. Series capacitor coupled
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