W7500x Reference Manual Version1.1.0
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UART0IMSC (UART0 Interrupt Mask Set/Clear Register) .................................. 336
UART0RIS (UART0 Raw Interrupt Status Register) ......................................... 338
UART0MIS (UART0 Masked Interrupt Status Register) ..................................... 339
UART0ICR (UART0 Interrupt Clear Register) ................................................ 340
Register map ............................................................................... 341
UART1 Registers(Base address: 0x4000_D000) ....................................... 342
UART1DR (UART1 Data Register) ............................................................. 342
UART1RSR/ECR (UART1 Receive Status Register/Error Clear Register) ................ 342
UART1FR (UART1 Flag Register) .............................................................. 343
UART1ILPR (UART1 IrDA Low-Power Counter Register) ................................... 344
UART1IBRD (UART1 Integer Baud Rate Register) .......................................... 345
UART1FBRD (UART1 Fractional Baud Rate Register) ...................................... 345
UART1LCR_H (UART1 Line Control Register) ............................................... 346
UART1CR (UART1 Control register) .......................................................... 347
UART1IFLS (UART1 Interrupt FIFO Level Select Register) ................................ 349
UART1IMSC (UART1 Interrupt Mask Set/Clear Register) .................................. 349
UART1RIS (UART1 Raw Interrupt Status Register) ......................................... 351
UART1MIS (UART1 Masked Interrupt Status Register) ..................................... 352
UART1ICR (UART1 Interrupt Clear Register) ................................................ 353
Register map ............................................................................... 354
Universal Asynchronous Receive Transmit(UART2) .......................................... 355
Introduction ................................................................................ 355
Feature ...................................................................................... 355
Functional description ................................................................... 355
Baud rate calculation .......................................................................... 355
UART2 Registers(Base address: 0x4000_6000) ....................................... 357
UART2DR (UART2 Data Register) ............................................................. 357
UART2SR (UART2 Status Register) ............................................................ 357
UART2CR (UART2 Control Register) .......................................................... 358
UART2ISR/ICR (UART2 Interrupt Status/Interrupt Clear Register) ..................... 358
UART2BDR (UART2 Baud Rate Divider Register) ........................................... 359
Register map ............................................................................... 360
Introduction ................................................................................ 361
Features .................................................................................... 361
Functional description ................................................................... 362