W7500x Reference Manual Version1.1.0
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T1CPS
R/W
[2:0] T1CPS – select prescale value of TIM1CLK clock
These bits are written by S/W to select
000 : 1/1 (bypass)
001 : 1/2
010 : 1/4
011 : 1/8
100 : 1/16
101 : 1/32
110 : 1/64
111 : 1/128
PWM0CLK source select register (PWM0CLK_SSR)
Address offset : 0x0b0
Reset value : 0x0000_0001
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P0CSS
R/W
[1:0] P0CPS – PWMCLK0 clock source select register.
These bits are written by S/W to select clock source
00 : disable clock
01 : PLL output clock (MCLK)
10 : Internal 8MHz RC oscillator clock (RCLK)
11 : External oscillator clock (OCLK, 8MHz ~ 24MHz)
PWM0CLK prescale value select register (PWM0CLK_PVSR)
Address offset : 0x0b4
Reset value : 0x0000_0000
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