6 F 2 T 0 1 7 2
BI2, and to 110V or 220V for BI3-BI6. In the case of a 24 / 48Vdc model, the input detection
nominal voltage can be set to 12V, 24V or 48V for BI1 and BI2, and to 24V or 48V for BI3-BI6.
In the case of a 48 / 110Vdc model, the input detection nominal voltage can be set to 24V, 48V or
110V for BI1 and BI2, and to 48V or 110V for BI3-BI6.
The binary input detection threshold voltage (i.e. minimum operating voltage) is normally set at
77V and 154V for supply voltages of 110V and 220V respectively. In case of 24V and 48V
supplies, the normal thresholds are 16.8V and 33.6V respectively. Binary inputs can be configured
for operation in a Trip Circuit Supervision (TCS) scheme by setting the [TCSPEN] switch to
“Enable”. In case TCS using 2 binary inputs is to be applied (refer to Section 3.3.3), then the binary
input detection threshold of BI1 and BI2 should be set to less than half of the rated dc supply
voltage.
The logic level inversion function, pick-up and drop-off delay timer and detection voltage change
settings are as follow:
Element
Contents
Range
Step
Default
BI1SNS – BI6SNS
Binary switch
Norm/ Inv
Norm
BITHR1 *
BI1-2 threshold Voltage 48 / 110 / 220
(12 / 24 / 48 )
(24 / 48 / 110 )
110
(24)
(48)
BITHR2 *
BI3-6 threshold voltage 110 / 220
(24 / 48)
(48 / 110)
110
(24)
(110)
TCSPEN
TCS enable
Off / On / Opt-On
Off
BI1PUD – BI6PUD
Delayed pick-up timer
0.00 - 300.00s
0.01s
0.00
BI1DOD – BI6DOD
Delayed drop-off timer
0.00 - 300.00s
0.01s
0.00
*At the PC interface software RSM100 (Relay Setting and Monitoring system), BI threshold voltage
settings are indicated by V1, V2 and V3. The V1, V2 and V3 are distinguished with 11th digit of
ordering code for supply voltage, as shown below,:
Supply voltage (11th digt of ordering cord) V1
V2
V3
110 - 220V (-1x-xx)
BITH1
48V
110V
220
BITH2
110V
220V
-
48 - 110V (-2x-xx)
BITH1
24V
48V
110V
BITH2
48V
110V
-
12 - 48V (-Ax-xx)
BITH1
12V
24V
48V
BITH2
24V
48V
-
The binary input detection threshold of BI1 and BI2 should be set to less than half of the rated dc
supply voltage.
The logic level inversion function, pick-up and drop-off delay timer and detection voltage change
settings are as follow:
65
Summary of Contents for GRE110
Page 183: ...6 F 2 T 0 1 7 2 Appendix B Signal List 184 ...
Page 191: ...6 F 2 T 0 1 7 2 Appendix C Event Record Items 192 ...
Page 196: ...6 F 2 T 0 1 7 2 Appendix D Binary Output Default Setting List 197 ...
Page 199: ...6 F 2 T 0 1 7 2 Appendix E Relay Menu Tree 200 ...
Page 210: ...6 F 2 T 0 1 7 2 Appendix F Case Outline 211 ...
Page 211: ...6 F 2 T 0 1 7 2 Case Outline for model 400 401 420 421 820 and 821 212 ...
Page 212: ...6 F 2 T 0 1 7 2 Case Outline for model 402 and 422 213 ...
Page 213: ...6 F 2 T 0 1 7 2 Appendix G Typical External Connection 214 ...
Page 245: ...6 F 2 T 0 1 7 2 Appendix J Return Repair Form 246 ...
Page 249: ...6 F 2 T 0 1 7 2 Customer Name Company Name Address Telephone No Facsimile No Signature 250 ...
Page 250: ...6 F 2 T 0 1 7 2 Appendix K Technical Data 251 ...
Page 256: ...6 F 2 T 0 1 7 2 Appendix L Symbols Used in Scheme Logic 257 ...
Page 259: ...6 F 2 T 0 1 7 2 Appendix M Modbus Interoperability 260 ...
Page 289: ...6 F 2 T 0 1 7 2 Appendix N IEC60870 5 103 Interoperability 290 ...
Page 296: ...6 F 2 T 0 1 7 2 Appendix O PLC Default setting 297 ...
Page 298: ...6 F 2 T 0 1 7 2 Appendix P Inverse Time Characteristics 299 ...
Page 304: ...6 F 2 T 0 1 7 2 Appendix Q IEC61850 Interoperability 305 ...