Themis RES-XR4-1U, Installation Manual

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Themis Computer
RES-XR4-1U Installation Manual Version 1.5
3.3.2.2 Power Button Function ............................................................... 3-6
3.3.2.3 Restore on AC Power Loss ......................................................... 3-6
3.3.3 CPU Configuration .................................................................................... 3-6
3.3.3.1
Socket 1 CPU Information/Socket 2 CPU Information .............. 3-7
3.3.3.2 CPU Speed .................................................................................. 3-7
3.3.3.3 Clock Spread Spectrum .............................................................. 3-7
3.3.3.4 Hyper-threading .......................................................................... 3-7
3.3.3.5 Active Processor Cores ............................................................... 3-7
3.3.3.6 Limit CPUID Maximum ............................................................. 3-8
3.3.3.7 Execute-Disable Bit Capability ................................................... 3-8
3.3.3.8 Intel
®
AES-NI ............................................................................. 3-8
3.3.3.9 Hardware Prefetcher .................................................................... 3-8
3.3.3.10 Adjacent Cache Line Prefetcher .................................................. 3-8
3.3.3.11 DCU Streamer Prefetcher ............................................................ 3-8
3.3.3.12 DCU IP Prefetcher ...................................................................... 3-8
3.3.3.13 Intel Virtualization Technology................................................... 3-9
3.3.4 CPU Power Management Configuration ................................................... 3-9
3.3.4.1
Power Technology ...................................................................... 3-9
3.3.5 Chipset Configuration .............................................................................. 3-11
3.3.5.1
NorthBridge Configuration ....................................................... 3-11
3.3.5.2 QPI (Quick Path Interconnect) Configuration .......................... 3-12
3.3.5.3 DIMM Configuration ................................................................ 3-13
3.3.5.4 DIMM Information ................................................................... 3-13
3.3.5.5 SouthBridge Configuration ....................................................... 3-15
3.3.6 SATA Configuration ................................................................................ 3-16
3.3.6.1
SATA Port0~SATA Port5 ........................................................ 3-16
3.3.6.2 SATA Mode .............................................................................. 3-16
3.3.7 SCU (Storage Control Unit) Configuration ............................................. 3-17
3.3.7.1
Storage Controller Unit ............................................................. 3-17
3.3.7.2 OnChip SCU Option ROM ....................................................... 3-18
3.3.7.3 SCU Port 0-SCU Port 7 ............................................................ 3-18
3.3.8 PCIe/PCI/PnP Configuration ................................................................... 3-18
3.3.8.1
PCI ROM Priority ..................................................................... 3-18
3.3.8.2 PCI Latency Timer .................................................................... 3-18
3.3.8.3 Above 4G Decoding .................................................................. 3-18
3.3.8.4 PERR# Generation .................................................................... 3-18
3.3.8.5 SERR# Generation .................................................................... 3-18
3.3.8.6 Maximum Payload .................................................................... 3-19