List of Figures
1-1
Video Port Block Diagram
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1-2
BT.656 Video Capture FIFO Configuration
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1-3
8-Bit Raw Video Capture and TCI Video Capture FIFO Configuration
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1-4
Y/C Video Capture FIFO Configuration
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1-5
16-Bit Raw Video Capture FIFO Configuration
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1-6
BT.656 Video Display FIFO Configuration
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1-7
8-Bit Raw Video Display FIFO Configuration
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1-8
8-Bit Locked Raw Video Display FIFO Configuration
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1-9
16-Bit Raw Video Display FIFO Configuration
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1-10
Y/C Video Display FIFO Configuration
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2-1
Video Port Control Register (VPCTL)
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2-2
Video Port Status Register (VPSTAT)
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2-3
Video Port Interrupt Enable Register (VPIE)
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2-4
Video Port Interrupt Status Register (VPIS)
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3-1
Video Capture Parameters
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3-2
8-Bit BT.656 FIFO Packing
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3-3
8-Bit Y/C FIFO Packing
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3-4
VCOUNT Operation Example (EXC = 0)
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3-5
HCOUNT Operation Example (EXC = 0)
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3-6
HCOUNT Operation Example (EXC = 1)
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3-7
Field 1 Detection Timing
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3-8
Chrominance Re-sampling
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3-9
1/2 Scaled Co-Sited Filtering
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3-10
1/2 Scaled Chrominance Re-sampled Filtering
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3-11
Edge Pixel Replication
3-12
Capture Window Not Requiring Edge Pixel Replication
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3-13
8-Bit Raw Data FIFO Packing
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3-14
16-Bit Raw Data FIFO Packing
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3-15
Parallel TCI Capture
3-16
Program Clock Reference (PCR) Header Format
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3-17
System Time Clock Counter Operation
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3-18
TCI FIFO Packing
3-19
TCI Timestamp Format (Little Endian)
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3-20
Capture Line Boundary Example
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3-21
Video Capture Channel x Status Register (VCxSTAT)
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3-22
Video Capture Channel A Control Register (VCACTL)
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3-23
Video Capture Channel x Field 1 Start Register (VCxSTRT1)
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3-24
Video Capture Channel x Field 1 Stop Register (VCxSTOP1)
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3-25
Video Capture Channel x Field 2 Start Register (VCxSTRT2)
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3-26
Video Capture Channel x Field 2 Stop Register (VCxSTOP2)
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3-27
Video Capture Channel x Vertical Interrupt Register (VCxVINT)
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3-28
Video Capture Channel x Threshold Register (VCxTHRLD)
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3-29
Video Capture Channel x Event Count Register (VCxEVTCT)
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3-30
Video Capture Channel B Control Register (VCBCTL)
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3-31
TCI Capture Control Register (TCICTL)
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3-32
TCI Clock Initialization LSB Register (TCICLKINITL)
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3-33
TCI Clock Initialization MSB Register (TCICLKINITM)
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3-34
TCI System Time Clock LSB Register (TCISTCLKL)
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3-35
TCI System Time Clock MSB Register (TCISTCLKM)
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3-36
TCI System Time Clock Compare LSB Register (TCISTCMPL)
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3-37
TCI System Time Clock Compare MSB Register (TCISTCMPM)
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3-38
TCI System Time Clock Compare Mask LSB Register (TCISTMSKL)
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8
List of Figures
SPRUEM1 – May 2007