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5.1.8 Video Port Pin Data Clear Register (PDCLR)
GPIO Registers
PDCLR is an alias of the video port pin data output register (PDOUT) for writes only and provides an
alternate means of driving GPIO outputs low. Writing a 1 to a bit of PDCLR clears the corresponding bit in
PDOUT. Writing a 0 has no effect. Register reads return all 0s.
The video port pin data clear register (PDCLR) is shown in
and described in
.
Figure 5-8. Video Port Pin Data Clear Register (PDCLR)
31
24
Reserved
R-0
23
22
21
20
19
18
17
16
Reserved
PDCLR22
PDCLR21
PDCLR20
PDCLR19
PDCLR18
PDCLR17
PDCLR16
R-0
W-0
W-0
W-0
W-0
W-0
W-0
W-0
15
14
13
12
11
10
9
8
PDCLR15
PDCLR14
PDCLR13
PDCLR12
Reserved
Reserved
PDCLR9
PDCLR8
W-0
W-0
W-0
W-0
W-0
W-0
W-0
W-0
7
6
5
4
3
2
1
0
PDCLR7
PDCLR6
PDCLR5
PDCLR4
PDCLR3
PDCLR2
Reserved
Reserved
W-0
W-0
W-0
W-0
W-0
W-0
R-0
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-9. Video Port Pin Data Clear Register (PDCLR) Field Descriptions
Bit
field
(1)
symval
(1)
Value
Description
31-23
Reserved
-
0
Reserved. The reserved bit location is always read as 0. A value written to this field
has no effect.
22
PDCLR22
OF(value)
Allows PDOUT22 bit to be cleared to a logic low without affecting other I/O pins
controlled by the same port.
DEFAULT
0
No effect.
NONE
VCTL3CLR
1
Clears PDOUT22 (VCTL3) bit to 0.
21
PDCLR21
OF(value)
Allows PDOUT21 bit to be cleared to a logic low without affecting other I/O pins
controlled by the same port.
DEFAULT
0
No effect.
NONE
VCTL2CLR
1
Clears PDOUT21 (VCTL2) bit to 0.
20
PDCLR20
OF(value)
Allows PDOUT20 bit to be cleared to a logic low without affecting other I/O pins
controlled by the same port.
DEFAULT
0
No effect.
NONE
VCTL1CLR
1
Clears PDOUT20 (VCTL1) bit to 0.
19-2
PDCLR[19-2]
OF(value)
Allows PDOUT[19-2] bit to be cleared to a logic low without affecting other I/O pins
controlled by the same port.
DEFAULT
0
No effect.
NONE
VDATAnCLR
1
Clears PDOUT[n] (VDATA[n]) bit to 0.
(1)
For CSL implementation, use the notation VP_PDCLR_PDCLRn_symval
General-Purpose I/O Operation
162
SPRUEM1 – May 2007