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Raw FIFO
VDIN[19−12] / VDIN[9−2]
VCLKINA
63
4847
32
Raw 2
Raw 3
Raw 6
Raw 7
Little-Endian Packing
31
1615
0
Raw 0
Raw 1
Raw 4
Raw 5
Raw 10
Raw 11
Raw 8
Raw 9
3.8
TCI Capture Mode
3.8.1 TCI Capture Features
3.8.2 TCI Data Capture
TCI Capture Mode
Figure 3-14. 16-Bit Raw Data FIFO Packing
The transport channel interface (TCI) capture mode captures MPEG-2 transport data.
The video port TCI capture mode supports the following features:
•
Supports SYNC detect using the PACSTRT input from a front-end device.
•
Data capture at the rising edge of incoming VCLK1.
•
Parallel data reception.
•
Maximum data rate of 30 Mbytes/second.
•
Programmable packet size.
•
Hardware counter mechanism to timestamp incoming packet data.
•
Programmable filtering of packets with errors.
•
Interrupt to the DSP, based on absolute system time or system time clock cycles.
The video port does not perform following functions; these functions should be performed in software:
•
PID filtering
•
Data parsing
•
De-scrambling of data
Eight-bit parallel data is received on the input data bus. Data is captured on the rising edge of VCLKIN.
The data consists typically of 188-byte packets, with the first byte a SYNC byte (also called a preamble).
The capture packet length is determined by the value of VCASTOP.
Data on the data bus is considered valid and captured only when the CAPEN signal is active. TCI data
capture begins with a SYNC byte as indicated by PACSTRT (and CAPEN) active. (The SYNC byte may
have any value.) Data is captured on each VCLK rising edge when CAPEN is active until the entire packet
has been captured, irrespective of additional PACSTRT transitions. The end-of-packet condition occurs
when the 24-bit capture byte counter (as reflected by the VCYPOS and VCXPOS bits of VCASTAT)
equals the value in the VCYSTOP and VCXSTOP bits of VCASTOP. The captured data includes both
SYNC byte and the data payload as shown in
After a packet is captured, the video port waits for the next active PACSTRT to begin capture of another
packet. Received packet data is packed into 64 bits before being written to the FIFO.
SPRUEM1 – May 2007
Video Capture Port
63