4.22 NAND Flash 4-Bit ECC 3 Register (NANDF4BECC3R)
SPRUGZ3A—May 2011
KeyStone Architecture External Memory Interface (EMIF16) User Guide
4-21
Chapter 4—Registers
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4.22 NAND Flash 4-Bit ECC 3 Register (NANDF4BECC3R)
The NAND Flash 4-Bit ECC 3 register is shown in
and described in
.
Figure 4-15
NAND Flash 4-Bit ECC 3 Register (NANDF4BECC3R)
31
26
25
16
15
10
9
0
Reserved
4BIT_ECC_VAL6
Reserved
4BIT_ECC_VAL5
R - 0x0
R - 0x0
R - 0x0
R - 0x0
Table 4-16
NAND Flash 4-Bit ECC 3 Register (NANDF4BECC3R) Details
Bit
Field
Value
Description
31-26
Reserved
0x0
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect
25-16
4BIT_ECC_VAL6
0x0
4-Bit ECC or syndrome value 6 calculated while writing or reading NAND Flash.
15-10
Reserved
0x0
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect
9-0
4BIT_ECC_VAL5
0x0
4-Bit ECC or syndrome value 5 calculated while writing or reading NAND Flash.
End of Table 4-16