![background image](http://html.mh-extra.com/html/texas-instruments/emif16/emif16_user-manual_1097088022.webp)
2.5 ASRAM/NOR Flash Interface
2-12
KeyStone Architecture External Memory Interface (EMIF16) User Guide
SPRUGZ3A—May 2011
Chapter 2—Architecture
www.ti.com
Bus contention is addressed by having a programmable turnaround time inserted
between back-to-back accesses to the same or different CE spaces (See
for
turnaround cycles).
shows the switching waveform for asynchronous writes in SS mode. Refer to
the device datasheet for device timing specifications.
Figure 2-7
Write Cycle (Select Strobe Mode)
2.5.6 WE Strobe Mode
In the WE strobe mode (
), the byte enables act as write strobes. This mode is
useful for combining two 8-bit devices to create a 16-bit data bus, allowing the EMIF16
to perform byte writes to two 8-bit devices which do not have byte enable inputs. In WE
strobe mode, the byte enables are connected to the write strobes of the 8-bit devices.
This mode cannot be used with the Select strobe (SS) mode as SS mode overrides WE
strobe mode. WE strobe mode is supported only on CE3.
EMIFCE
EMIFBE[1:0]
EMIFA[23:0]
Byte enables
Address
Write data
EMIFD[15:0]
EMIFOE
EMIFWE
EMIFRnW
Write setup
Write strobe
Write hold