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3.7 ECC Support
SPRUGZ3A—May 2011
KeyStone Architecture External Memory Interface (EMIF16) User Guide
3-7
Chapter 3—Operating Modes
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Following steps must be taken by software for 4-bit ECC calculation:
Writes
1.
Start 4-bit ECC calculation:
Set the 4BIT_ECC_START bit in the NAND Flash Control Register to 1.
2.
Perform Write:
Write 518 Bytes of data to NAND Flash.
3.
Read Parity:
Read the 10-bit parity values from NAND Flash 4-Bit ECC 1-4 registers.
4.
10-Bit to 8-Bit Conversion:
Convert the 10-bit parity values to 8-bits or 16-bits depending on width of
connected NAND Flash. This can be accomplished by concatenating the 10-bit
values together and then breaking them into ten 8-bit or five 16-bit values.
5.
Store Parity:
Store the parity to spare location in the NAND Flash.
Reads
1.
Start 4-bit ECC calculation:
Set the 4BIT_ECC_START bit in the NAND Flash Control Register to 1.
2.
Perform Read:
Read 518 Bytes of data from NAND Flash.
3.
Clear 4BIT_ECC_START bit:
Clear 4BIT_ECC_START bit in NANDFCR by reading any of the NAND Flash
4-Bit ECC registers.
4.
Read Parity:
Read parity stored in the spare location of NAND Flash.
5.
8-Bit or 16-Bit to 10-Bit conversion:
Convert 8 or 16-bit parity values to 10-bits. This can be accomplished by
concatenating ten 8-bit values or five 16-bit values and then breaking them into
8 10-bit values.
6.
Write Parity Values:
Write the 10-bit parity values in the NAND Flash 4-Bit ECC Load Register.
7.
Dummy Read:
Perform a dummy read to EMIF16 Revision Code and Status Register. This
ensures sufficient time for syndrome calculation after writing the ECC values in
previous step.
8.
Read Syndrome:
Read syndrome from NAND Flash 4-Bit ECC 1-4 Registers. A syndrome value
of 0 signifies no bit errors whereas non-zero value implies one or more errors.
Perform the following steps in case of a non-zero syndrome.
9.
Start Address Calculation:
Set ADDR_CAL_ST bit in NANDFCR to start error address calculation.