ADV
ANCEINFORMA
TION
TMS320F28377S, TMS320F28376S, TMS320F28375S, TMS320F28374S
SPRS881A – AUGUST 2014 – REVISED JUNE 2015
5.9.5
Sigma-Delta Filter Module (SDFM)
The SDFM is a four-channel digital filter designed specifically for current measurement and resolver
position decoding in motor control applications. Each channel can receive an independent sigma-delta
(
ΣΔ
) modulated bit stream. The bit streams are processed by four individually programmable digital
decimation filters. The filter set includes a fast comparator for immediate digital threshold comparisons for
over-current and under-current monitoring.
shows a block diagram of the SDFMs.
SDFM features include:
•
Four external pins per SDFM module:
–
Four sigma-delta data input pins per SDFM module (SDx_Dy, where x = 1 to 2 and y = 1 to 4)
–
Four sigma-delta clock input pins per SDFM module (SDx_Cy, where x = 1 to 2 and y = 1 to 4)
•
Four different configurable modulator clock modes:
–
Modulator clock rate equals modulator data rate
–
Modulator clock rate running at half the modulator data rate
–
Modulator data is Manchester encoded. Modulator clock not required.
–
Modulator clock rate is double that of modulator data rate
•
Four independent configurable comparator units:
–
Four different filter type selection (Sinc1/Sinc2/Sincfast/Sinc3) options available
–
Ability to detect over-value and under-value conditions
–
OSR value for comparator programmable from 1 to 32
•
Four independent configurable sinc filter units:
–
Four different filter type selection (Sinc1/Sinc2/Sincfast/Sinc3) options available
–
OSR value for filter unit programmable from 1 to 256
–
Ability to enable or disable individual filter module
–
Ability to synchronize all four independent filters of a SDFM module using the Master Filter Enable
(MFE) bit or the PWM signals.
•
Filter data can be 16-bit or 32-bit representation
•
PWMs can be used to generate modulator clock for sigma-delta modulators
Copyright © 2014–2015, Texas Instruments Incorporated
Specifications
121
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