ADV
ANCEINFORMA
TION
TMS320F28377S, TMS320F28376S, TMS320F28375S, TMS320F28374S
SPRS881A – AUGUST 2014 – REVISED JUNE 2015
6.6.5.3
Global Shared RAM (GSx RAM)
RAM blocks which are accessible from both the CPU and DMA are called global shared RAMs (GSx
RAMs). Both the CPU and DMA have full read and write access to these memories.
All GSx RAM blocks have parity.
The GSx RAMs have access protection (CPU write/CPU fetch/DMA write).
6.6.5.4
CLA Message RAM (CLA MSGRAM)
These RAM blocks are be used to share data between the CPU and CLA. The CLA has read and write
access to the "CLA to CPU MSGRAM". The CPU has read and write access to the "CPU to CLA
MSGRAM". The CPU and CLA both have read access to both MSGRAMs.
This RAM has parity.
6.6.6
Dual Code Security Module
The dual code security module (DCSM) prevents access to on-chip secure memories. The term “secure”
means access to secure memories and resources is blocked. The term “unsecure” means access is
allowed; for example, through a debugging tool such as Code Composer Studio.
The code security mechanism offers protection for two zones, Zone 1 (Z1) and Zone 2 (Z2). The security
implementation for both the zones is identical. Each zone has its own dedicated secure resource and
allocated secure resource.
The security of each zone is ensured by its own 128-bit password (CSM password). The password for
each zone is stored in an OTP memory location based on a zone-specific link pointer. The link pointer
value can be changed to program a different set of security settings (including passwords) in OTP. The
secure resources available are: OTP memory, CLA, LSx RAM, flash sectors, and secure ROM.
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Detailed Description
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