ADV
ANCEINFORMA
TION
W
V
U
T
R
P
N
M
L
K
10
9
8
7
6
5
4
3
2
1
6
5
4
3
2
1
V
SS
V
SSA
V
SSA
V
SSA
V
SSA
V
SSA
V
DDA
V
DDA
V
REFHIB
V
REFLOB
V
REFHID
V
REFLOD
V
REFHIA
V
REFHIC
V
REFLOA
V
REFLOC
W
V
U
T
GPIO129
GPIO125
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO108
GPIO107
GPIO106
GPIO111
GPIO112
GPIO110
GPIO109
GPIO114
GPIO113
GPIO122
ADCIND4
ADCIND2
ADCIND0
ADCIN14
ADCIN15
ADCINC5
ADCINC3
ADCINC2
ADCINA5
ADCINA3
ADCINA1
ADCINA0
ADCINA2
ADCINA4
ADCINC4
ADCIND1
ADCIND3
ADCINB4
ADCINB2
ADCINB0
ADCINB1
ADCINB3
ADCINB5
ADCIND5
GPIO123
GPIO124
GPIO126
GPIO127
GPIO128
GPIO130
GPIO131
GPIO116
R
P
V
SS
V
SS
V
SS
V
SS
V
SS
V
DD
V
DD
V
DD
V
DDIO
V
DDIO
V
DDIO
V
DDIO
V
DDIO
V
DDIO
V
DD
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
10
9
8
M
L
K
N
M
L
K
10
9
8
7
TMS320F28377S, TMS320F28376S, TMS320F28375S, TMS320F28374S
SPRS881A – AUGUST 2014 – REVISED JUNE 2015
4
Terminal Configuration and Functions
4.1
Pin Diagrams
to
show the terminal assignments on the 337-ball ZWT New Fine Pitch Ball Grid
Array. Each figure shows a quadrant of the terminal assignments.
shows the pin assignments
on the 176-pin PTP PowerPAD Thermally Enhanced Low-Profile Quad Flatpack.
shows the pin
assignments on the 100-pin PZP PowerPAD Thermally Enhanced Thin Quad Flatpack.
A.
Only the GPIO function is shown on GPIO terminals. See
for the complete, muxed signal name.
Figure 4-1. 337-Ball ZWT New Fine Pitch Ball Grid Array (Bottom View) – [Quadrant A]
12
Terminal Configuration and Functions
Copyright © 2014–2015, Texas Instruments Incorporated
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