Terasic TR-5 Lite FPGA, User Manual

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TR5-Lite User Manual 67 www.terasic.com
June 20, 2018

Power on the TR5-Lite board.

Execute the demo batch file “test.bat (or test_ub2.bat)” under the batch file folder,
TR5_LITE_SI570_CONTROLLER\demo_batch

Press BUTTON1 to configure the SI570.

Observe LED3 status.
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This demonstration shows how to use the Nios II processor to program both programmable
oscillators Si570 and CDCM on TR5-Lite Board. The demonstration also includes a function to
monitor system temperature with the on-board temperature sensor.

System Block Diagram
Figure 5-6 shows the system block diagram of this demonstration. The system requires a 50 MHz
clock provided from the board. The three peripheral temperature sensor, Si570, and CDCM61004
are all controlled by Nios II through the PIO controller. The temperature sensor and external PLL
Si570 are controlled through I2C interface. The Nios II program toggles the PIO controller to
implement the I2C protocol. The CDCM 61004 is programmed through the PIO directly. The Nios
II program is running in the on-chip memory.