Terasic TR-5 Lite FPGA, User Manual

Page: 14 / 86

TR5-Lite User Manual 14 www.terasic.com
June 20, 2018
Figure 2-2 The TR5-Lite Board (Bottom)
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
Configure
The TR5-Lite board supports two configuration methods for the Stratix V FPGA:

External USB-Blaster for configuring the FPGA using the external USB-Blaster.

Flash memory configuration of the FPGA using stored images from the flash memory on
power-up.
For programming by USB-Blaster, the USB-Blaster should connect to the JTAG header (J3) on the
TR5-Lite board. The following procedures show how to download a configuration bit stream into
the Stratix V GX FPGA:

Make sure that power is provided to the TR5-Lite board

Connect your PC to the TR5-Lite board using a USB-Blaster (or USB-Blaster II) module and
make sure the USB-Blaster driver is installed on PC.

Launch Quartus II programmer and make sure the USB-Blaster (or USB-Blaster II) is detected.

In Quartus II Programmer, add the configuration bit stream file (.sof), check the associated
“Program/Configure” item, and click “Start” to start FPGA programming.