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Chapter 7
Operation
79
The possibility of blooming or data loss strongly limits the number of pixels that may be
binned in cases where there is a small signal superimposed on a large background, such
as signals with a large fluorescence. Ideally, one would like to bin many pixels to
increase the S/N ratio of the weak peaks but this cannot be done because the
fluorescence would quickly saturate the CCD. The solution is to perform the binning in
software. Limited hardware binning may be used when reading out the CCD. Additional
post-processing binning is accomplished in software, producing a result that represents
many more photons than was possible using hardware binning.
7.8.3.1
CCD Type and Readout Port(s)
The PI-MAX3 will either have a full frame or an interline CCD. Full frame CCDs such as
the 1024x256 device have a single port for readout. The 1024x1024 interline CCD is
designed for either dual or single port readout. When single port readout is active, the
port used has been set at the factory.
Dual port readout is about two times faster than single port readout and occurs
whenever the full frame is being read out or when an ROI is symmetrical about the
horizontal center of the CCD.
•
In WinX, a single port readout will automatically occur when an ROI is not
symmetrical about the horizontal center of the CCD.
•
In LightField, you can either change the ROI location/size or select single port
readout (via the Advanced panel on the Region of Interest expander).
7.8.3.1.1
Full Frame Binning
illustrates 2 x 2 binning with dual port operation for an interline array. Each
pixel of the image displayed by the software represents 4 pixels of the array.
Figure 7-8: Dual Port Readout: 2 x 2 Binning, Interline CCD
Empty Readout Register. Exposure has ended
and image has been shifted to masked area
of each pixel.
.
Charges from two masked areas in each column
have been shifted to Readout Register and added.
After sum of first four charges have been transferred
from Output Nodes, next set of charges are shifted into
Readout Register and added.
Four charges have been shifted to the Output
Nodes and added.
A1
B1
C1
A2
B2
A4
A3
B4
B3
A6
A5
B6
B5
C2
C4
C3
C6
C5
D1
D2
D4
D3
D6
D5
A4
A3
B4
B3
A6
A5
B6
B5
C4
C3
C6
C5
D4
D3
D6
D5
A1
A2
+
B1
B2
+
+
A6
A5
B6
B5
C6
C5
D6
D5
A4
A3
B4
B3
A6
A5
B6
B5
C4
C3
C6
C5
D4
D3
D6
D5
A1
A2
+
C1
C2
+
D1
D2
+
B1
B2
+
1
4
3
2
C1
C2
+
D1
D2
+
+
A3
A4
+
C3
C4
+
D3
D4
+
B3
B4
+
4
4
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Summary of Contents for Princeton Instruments PI-MAX 3
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