Teledyne 200E, Instruction Manual, Page: 187 / 302

Theory of Operation Model 200E Instruction Manual
T-API. It communicates with the user, receives data from and issues commands to a variety
of peripheral devices through the motherboard, the main printed circuit assembly on the
rear panel (Figure 3-2).
10.3.1. CPU
The CPU is a low power (5 VDC, 0.8A max), high performance, 386-based microcomputer
running a version of the DOS operating system. Its operation and assembly conform to the
PC-104 specification, version 2.3 for embedded PC and PC/AT applications. It has 2 MB of
DRAM memory on board and operates at 40 MHz clock rate over an internal, 32-bit data
and address bus. Chip to chip data handling is performed by two 4-channel, direct memory
access (DMA) devices over data busses of either 8-bit or 16-bit bandwidth. The CPU
supports both RS-232 and RS-485 serial protocols. Figure 10-12 shows the CPU board.
• The CPU communicates with the user and the outside world in a variety of ways:
• Through the analyzer’s keyboard and vacuum fluorescence display over a clocked,
digital, serial I/O bus using the I
2
C protocol (read I-square-C bus )
• RS-232 and/or RS-485 serial ports (one of which can be connected to an Ethernet
converter)
• Various analog voltage and current outputs
• Several digital I/O channels
Figure 10-12: M200E CPU Board Annotated
Finally, the CPU issues commands (also over the I2C bus) to a series of relays and switches
located on a separate printed circuit assembly, the relay board (located in the right rear of
172 044100102 Rev A