Tektronix LTA7P Series, Service Manual

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Specifications
1- 2
TLA7Nx, TLA7Px, & TLA7Qx Logic Analyzer Module Service Manual
H
The logic analyzer module must have had its signal-path-compensation
routine (self-calibration) last executed after at least a 30 minute warm-up
period.
Table 1- 1: LA module channel width and depth
Characteristic Description
Number of channels Product Channels
TLA7N1 32 data and 2 clock
TLA7N2, TLA7P2, TLA7Q2 64 data and 4 clock
TLA7N3, TLA7L3, TLA7M3 96 data, 4 clock, and 2 qualifier
TLA7N4, TLA7P4, TLA7Q4 128 data, 4 clock, and 4 qualifier
Acquisition memory depth Product Memory depth
TLA7L1, TLA7L2, TLA7L3, TLA7L4 32 K or 128 K samples
TLA7N1, TLA7N2, TLA7N3, TLA7N4 64 K or 256 K or 1 M or 4 M samples
1
TLA7P2, TLA7P4 16 M samples
TLA7Q2, TLAQP4 64 M samples
1
PowerFlex options
Table 1- 2: LA module clocking
Characteristic Description
Asynchronous clocking
n
Internal sampling period
1
4 ns to 50 ms in a 1--2--5 sequence
2 ns in 2x Clocking mode
n
Minimum recognizable word
2
(across all channels)
Channel-to-channel skew + sample uncertainty
Example: for a P6417 or a P6418 Probe and a 4 ns sample period =
1.6 ns + 4 ns = 5.6 ns
Synchronous clocking
Number of clock channels
3
Product Clock channels
TLA7N1 2
TLA7N2, TLA7P2, TLA7Q2 4
TLA7N3 4
TLA7N4, TLA7P4, TLA7Q4 4
Number of qualifier channels Product Qualifier channels
TLA7N1 0
TLA7N2, TLA7P2, TLA7Q2 0
TLA7N3 2