Tektronix LTA7P Series, Service Manual

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Specifications
1- 6
TLA7Nx, TLA7Px, & TLA7Qx Logic Analyzer Module Service Manual
Table 1- 3: LA module trigger system (Cont.)
Characteristic Description
Storage control
Global storage Storage is allowed only when a specific condition is met. This condition can use any
of the trigger machine resources except for the counter/timers. Storage commands
defined in the current trigger state will override the global storage control.
Global storage can be used to start the acquisition with storage initially turned on
(default) or turned off.
By event Storage can be turned on or off; only the current sample can be stored. The event
storage control overrides any global storage commands.
Block storage When enabled, 31 samples are stored before and after the valid sample.
Block storage is disallowed when glitch storage or setup and hold violation is enabled.
Glitch violation storage The acquisition memory can be enabled to store glitch violation information with each
data sample when asynchronous clocking is used. The probe data storage size is
reduced by one half (the other half holds the violation information). The fastest
asynchronous clocking rate is reduced to 10 ns.
1
Each use of a glitch detector, setup and hold violation detector, or transition detector requires a trade-off of one word
recognizer resource.
2
Any glitch is subject to pulse width variation of up to the channel-to-channel skew specifi 0.5 ns.
3
For TLA7N1, TLA7N2, TLA7N3, TLA7N4, TLA7P2, TLA7P4, TLA7Q2, and TLA7Q4 Logic Analyzer modules, any setup
value is subject to variation of up to 1.8 ns; any hold value is subject to variation of up to 1.2 ns.
4
This mode can be used to create transitional storage selections where all channels are enabled.
Table 1- 4: LA module MagniVu feature
Characteristic Description
MagniVu memory depth 2016 samples per channel
MagniVu sampling period Data is asynchronously sampled and stored every 500 ps in a separate high resolution
memory.
Table 1- 5: LA module data handling
Characteristic Description
Nonvolatile memory retention time
(Typical) Battery is integral to the NVRAM. Battery life is > 10 years.