Tektronix LTA7P Series, Service Manual

Page: 57 / 172

Performance Verification: Logic Analyzer Module
TLA7Nx, TLA7Px, & TLA7Qx Logic Analyzer Module Service Manual
4- 9
NOTE
. These procedures assume the P6418 or P6417 probes are being used. If
you have a P6434 probe, use J5, the Data Out connector on the adjustment/veri-
fication fixture for verifying probe functionality. Observe proper polarity: pin 1
to pin 1.
7.
Connect the single clock (CK n) or the qualifier (Q n) channel to one of the
J3 CLK OUT connector pairs on the adjustment/verification fixture.
8. Return to the Setup window and click the Show Activity button to display
the Activity Monitor.
9. Verify that the Activity Monitor shows activity on all probe channels
connected to the test fixture.
Figure 4--3 shows an example of the Activity Monitor. Note the signal
activity for clock CK3 and data channels for the C3(7-0) and C2(7-0) groups.
Also note that there is no activity on the other groups because the probe
podlets are not connected to a signal source (the channels are all high).
Figure 4- 3: Activity Monitor
10. Verify that none of the connected channels are stuck high or stuck low.
11.
Disconnect the probe from the adjustment/verification fixture and module.
12. Repeat steps 5 through 11 for any remaining probes.
13. Close the Activity Monitor.
14. Return the threshold levels to their former values in the Probe Threshold
window.