Tektronix LTA7P Series Service Manual Download Page 156

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Diagrams

9- 2

TLA7Nx, TLA7Px, & TLA7Qx Logic Analyzer Module Service Manual

Acquisition Board

100

Local Processor Unit Board

68360 based

microprocessor

system

Communications

Interface

Bus

100

Acquisition

system

Backplane

Interface

Trigger

Power

supplies

Acquisition

Board

Interface

LPU

Board

Interface

TLA7N4

TLA7P4, and
TLA7Q4 only

TLA7N3,TLA7N4,
TLA7P4, TLA7Q4

only

Acquisition

Memory

Probe Interface

Clocks

Comparator

Daughter Board

Comparator

Daughter Board

Merge

Bus

Probe

Figure 9- 2: Block diagram

Summary of Contents for LTA7P Series

Page 1: ...x TLA7Qx 071 0864 01 Warning The servicing instructions are for use by qualified personnel only To avoid personal injury do not perform any servicing unless you are qualified to do so Refer to all saf...

Page 2: ...Information in this publication supercedes that in all previously published material Specifications and price change privileges reserved Tektronix Inc 14200 SW Karl Braun Drive Beaverton OR 97077 TEKT...

Page 3: ...tions This warranty shall not apply to any defect failure or damage caused by improper use or improper or inadequate maintenance and care Tektronix shall not be obligated to furnish service under this...

Page 4: ......

Page 5: ...llation 2 1 Software Installation and Removal 2 2 Operating Information 2 4 Merged Modules 2 10 Merging Rules 2 10 Theory of Operation Block Level Description 3 1 Performance Verification Performance...

Page 6: ...harge 6 1 Inspection and Cleaning 6 2 Removal and Installation Procedures 6 5 Preparation 6 5 Tools Required 6 5 Torque Requirements 6 5 Injector Ejector Handles 6 6 Cover 6 7 Daughter Boards 6 11 Loc...

Page 7: ...TLA7Nx TLA7Px TLA7Qx Logic Analyzer Module Service Manual iii Electrical Parts List Diagrams Interconnection Block Diagram 9 1 Mechanical Parts List Parts Ordering Information 10 1 Using the Replaceab...

Page 8: ...xture detail 4 23 Figure 4 10 Probe tip adapter detail 4 26 Figure 4 11 Adjustment verification fixture detail 4 28 Figure 5 1 P6434 probe detail 5 4 Figure 5 2 Initial deskew test setup 5 8 Figure 5...

Page 9: ...t 6 35 Figure 9 1 Interconnections 9 1 Figure 9 2 Block diagram 9 2 Figure 10 1 TLA700 Series Logic Analyzer Module exploded view 10 4 Figure 10 2 TLA700 Series LPU board exploded view 10 8 Figure 10...

Page 10: ...e functional verification procedures 4 4 Table 4 3 LA Module performance verification tests 4 12 Table 4 4 LA Module characteristics indirectly checked by the performance verification tests 4 12 Table...

Page 11: ...fore making connections to the input or output terminals of the product ensure that the product is properly grounded Observe All Terminal Ratings To avoid fire or shock hazard observe all ratings and...

Page 12: ...of life CAUTION Caution statements identify conditions or practices that could result in damage to this product or other property Terms on the Product These terms may appear on the product DANGER indi...

Page 13: ...of this product unless another person capable of rendering first aid and resuscitation is present Disconnect Power To avoid electric shock disconnect the main power by means of the power cord or if pr...

Page 14: ...Service Safety Summary x TLA7Nx TLA7Px TLA7Qx Logic Analyzer Module Service Manual...

Page 15: ...the characteristics and descriptions that apply to it H Operating Information includes basic installation and operating instructions at the level needed to safely operate and service the logic analyz...

Page 16: ...ional check and performance verification procedures Specifications and replaceable parts information are documented in this service manual Certification procedures certify a product and provide a trac...

Page 17: ...the Safety Summary found at the beginning of this manual Related Manuals The following manuals are available as part of the TLA700 Series Logic Analyzer documentation set Refer to Optional Accessorie...

Page 18: ...com Sales support 1 800 833 9200 select option 1 Service sup port 1 800 833 9200 select option 2 Technical sup port Email techsupport tektronix com 1 800 833 9200 select option 3 1 503 627 2400 6 00...

Page 19: ...ngs and cautions Adjustment and Certification Interval Generally you should perform the adjustments and certification calibration described in the Performance Verification and Adjustment Procedures ch...

Page 20: ...worldwide by the leading edge design manufacturing and service resources of Tektronix to provide the best possible service The following services can be tailored to fit your requirements for calibrati...

Page 21: ...econfigured to the proper PowerFlex level You can also return the repaired module to your local service center for configuration H Model number and serial number H PowerFlex option upgrade number H Fi...

Page 22: ...Introduction xviii TLA7Nx TLA7Px TLA7Qx Logic Analyzer Module Service Manual...

Page 23: ...asynchronous acquisition into a 2 K high resolution timing buffer H 250 MHz trigger capability plus special setup and hold violation triggering and glitch triggering H Data correlation with other mod...

Page 24: ...TLA7L1 TLA7L2 TLA7L3 TLA7L4 32 K or 128 K samples TLA7N1 TLA7N2 TLA7N3 TLA7N4 64 K or 256 K or 1 M or 4 M samples1 TLA7P2 TLA7P4 16 M samples TLA7Q2 TLAQP4 64 M samples 1 PowerFlex options Table 1 2 L...

Page 25: ...n be moved for each channel group from 8 5 ns Ts to 7 0 ns Ts in 0 5 ns steps setup time Hold time follows the setup time by the setup and hold window size n Maximum synchronous clock rate4 200 MHz in...

Page 26: ...rd recognizers 3 range recognizers 4 word recognizers 4 range recognizers Range recognizer channel order From most significant probe group to least significant probe group C3 C2 C1 C0 E3 E2 E1 E0 A3 A...

Page 27: ...In 2 glitch detection setup and hold detection or transition detection resources are added Trigger States 16 n Trigger State sequence rate Same rate as valid data samples received 250 MHz maximum Trig...

Page 28: ...each data sample when asynchronous clocking is used The probe data storage size is reduced by one half the other half holds the violation information The fastest asynchronous clocking rate is reduced...

Page 29: ...l to channel skew Typical 1 0 ns typical When merged add 0 3 ns for the slave module Sample uncertainty Asynchronous Sample period Synchronous 500 ps Probe input resistance Typical 20 k Probe input ca...

Page 30: ...both modules plus the CLK QUAL channels active clocks for the merge system of the master module plus the CLK QUAL channels nonactive stored clock channels to the merge system Merge system acquisition...

Page 31: ...strated to the following specifications as listed in the Official Journal of the European Communities EN 55011 Class A Radiated and Conducted Emissions EN 50081 1 Emissions EN 60555 2 AC Power Line Ha...

Page 32: ...ata clock output amplitude 10K Motorola ECLinPS family outputs DC threshold output Output equals user applied input Input requirements External Clock input 1 0 Vp p centered around the fixture ground...

Page 33: ...logic analyzer module logical address to 00 Logical address 00 is reserved for the controller Dynamic Autoconfiguration With Dynamic Auto Configuration Recommended selected hexadecimal FF or decimal 2...

Page 34: ...res for merging modules is described in the Tektronix Logic Analyzer Family User Manual Software Installation and Removal These procedures describe loading and unloading the performance verification a...

Page 35: ...nstallation cannot be completed Follow these instruc tions to verify the directory is not present 1 Select Start Search For Files or Folders 2 In the Search for files or folders box type Tekcats or Te...

Page 36: ...following directory path under Documents and Settings All Users Start Menu Programs 7 Locate and delete the TLA Performance Verification item Operating Information This section provides a general des...

Page 37: ...c Analyzer Module Service Manual 2 5 READY Indicator ACCESSED Indicator ARM D Indicator TRIG D Indicator Probe connectors Configuration label Injector ejector handle Probe retainer mounting holes Figu...

Page 38: ...logic analyzer module Two Merged Modules When two modules are merged the master module is on the left lower numbered slot and the slave module is on the right Three Merged Modules When three modules...

Page 39: ...gic analyzer module performs the power on diagnostics each time you power on the mainframe The Calibration and Diagnostics property sheet appears at power on if one of the module diagnostics fails You...

Page 40: ...e Self Calibration The logic analyzer module may require several min utes to run the self calibration depending on the number of channels Select Calibration and Diagnostics property sheet from the Sys...

Page 41: ...dialogs contain information to set up the window as needed For the DSO the Setup window contains setup information for each DSO channel such as the input voltage ranges bandwidth coupling and terminat...

Page 42: ...ths will assume the depth of the shallowest module H When merging two modules of unequal channel widths use the module with the higher number of channels as the master module H When merging three modu...

Page 43: ...ogic Analyzer Module Service Manual 2 11 In a two way merge the master module is on the left and the slave module is on the right as shown in Figure 2 3 Master Module Slave Module Figure 2 3 Location...

Page 44: ...7Nx TLA7Px or TLA7Qx LA modules only the master module is in the center Slave module 1 is to the right of the master module Slave module 2 is on the left of the master module as shown in Figure 2 4 Ma...

Page 45: ...send it to the logic analyzer module for processing A single 102 channel or 136 channel logic analyzer module can be merged with a second or third module to create a two and three module wide logic a...

Page 46: ...V DC to DC converter F1983 24 V Supplies the 24 V to 5 V DC to DC converter This 5 V output powers the acquisition RAM on the Acquisition board F1981 24 V Supplies the 24 V to 5 V DC to DC converter T...

Page 47: ...ta sample takes up two memory locations one to store the actual data sample and the other to store the corresponding glitch information Backplane Interface The backplane interface provides the interfa...

Page 48: ...als on the local bus of the mainframe backplane The local bus sends the system clock of the Master module to the Slave module The two merged modules must be located in adjacent slots The merge Cable C...

Page 49: ...xture you can make copies of the calibration data report included with this manual and then fill out the report with the data that you obtain from the performance verification procedures Performance v...

Page 50: ...in procedure Set up test equipment Select procedure Allow all mainframes modules and equipment to warm up 30 minutes Are all certifications complete Done Is it OK with customer to remove reconnect pro...

Page 51: ...1 ms interval Tektronix TDS 784D 4 DSO probes Two required with one inch ground leads Tektronix P6243 or P6245 probe with accesso ries 5 1X probe One required with one inch ground leads Tektronix P61...

Page 52: ...stment verification fixture required Single logic analyzer module Extended diagnostics No Merged logic analyzer module Extended diagnostics Merge diagnostics No No P6417 P6418 and P6434 Logic Analyzer...

Page 53: ...n instructions Power on the instrument and allow a 30 minute warmup before continuing with any procedures in this section During power on the installed modules perform an internal self test to verify...

Page 54: ...inning this procedure be sure that no active signals are applied to the instrument Certain diagnostic tests will fail if signals are applied to the probe during the test 1 In the logic analyzer applic...

Page 55: ...this procedure be sure that no active signals are applied to the instrument Certain diagnostic tests will fail if signals are applied to the probe during the test 1 In the logic analyzer application...

Page 56: ...5 Figure 4 2 Probe functional verification test setup Perform the following steps to complete the probe functional verification 1 Ensure that the jumper at J15 on the adjustment verification fixture i...

Page 57: ...lay the Activity Monitor 9 Verify that the Activity Monitor shows activity on all probe channels connected to the test fixture Figure 4 3 shows an example of the Activity Monitor Note the signal activ...

Page 58: ...r and state speed through the logic analyzer application In the application go to the System menu select System Properties and then click the LA module tab However you must quit the logic analyzer app...

Page 59: ...erformance verification and adjustment software you will connect external test equipment to the LA module in response to prompts on the screen You will connect the test signals and then instruct the p...

Page 60: ...t name Specification tested 1 FPV_SETUP_0F Minimum recognizable word1 2 2 FPV_HOLD_0F Minimum recognizable word1 2 3 All tests Trigger state sequence rate 4 All tests and Extended Diagnostics Internal...

Page 61: ...wing H For the LA modules select LA 7XX PV 5 Follow the instructions on the screen to enter the name you want to appear in the User Name field as shown below This name will appear on the Calibration D...

Page 62: ...runs part of the full sequence The sequence runs from the selected starting point to the end of the sequence H SELECT TEST S runs only the selected tests To run a single test enter the test number To...

Page 63: ...ed to your logic analyzer and follow the on screen instructions to print the test results If a printer is not available you can view the test results directly from the screen or you can copy the test...

Page 64: ...a Out connector When using either type of probe always observe correct polarity GND to GND pin 1 to pin 1 J20 J6 J7 J1 J2 J3 J16 J13 J4 J11 J17 J19 J9 J18 J10 J8 J15 J26 GND GND Setup Hold Clock out C...

Page 65: ...nd SELF_CAL pass Voltage reference BNC cable 0 1 F Capacitor Adjustment verification fixture J7 J6 Fixture supply J26 Dual banana to BNC adapter J22 J14 Threshold out P6434 C2 C3 CK3 Channel Group Fig...

Page 66: ...SELF_CAL pass Adjustment verification fixture J2 J1 J26 Fixture supply J4 Clock channel C2 C3 CK3 Channel Group J5 Figure 4 6 Initial FPV_Setup_0F test setup 1 If the logic analyzer application is ru...

Page 67: ...SELF_CAL pass Adjustment verification fixture J26 Fixture supply J2 J1 J4 Clock channel C2 C3 CK3 Channel Group J5 Figure 4 7 Initial FPV_Hold_0F test setup 1 If the logic analyzer application is run...

Page 68: ...hown in Figure 4 8 Diagnostics and SELF_CAL pass Adjustment verification fixture Sine wave generator Type N to BNC adapter BNC cable J18 Fixture supply J26 J2 J1 J4 Clock channel C2 C3 CK3 Channel Gro...

Page 69: ...quipment list for the procedures in this section Each piece of equipment used in these procedures is referenced by an item number to the equipment listed in Table 4 1 Functional Verification The funct...

Page 70: ...be item 4 Prerequisites Warm up time 30 minutes for adjustment verification fixture and test equipment 1 Set the jumper positions as called out in the table Refer to Figure 4 9 on page 4 23 for jumper...

Page 71: ...n falling edge Jumper removed clocked on rising edge SETUP HOLD J17 Setup Hold select External Clock in J5 J14 1 2 3 4 5 J13 P6434 Deskew Probe setup J4 PROBE SETUP DESKEW R127 R39 R67 R321 R85 R38 VD...

Page 72: ...easurement for CH1 Frequency H Gating Off e Set up the Cursor menu as follows H Function Off f Set up the Acquire menu as follows H Acquisition Mode Sample H Repetitive Signal On 6 Using the oscillosc...

Page 73: ...following requirements are met H The adjustment verification fixture must have been operating for a warm up period of at least 30 minutes and must be operating at an ambient tempera ture between 20_ C...

Page 74: ...he primary function of the custom probe tip adapter is to minimize the length of the ground lead of the probe Build the custom probe tip adapter as shown in Figure 4 10 Adjust this distance to span a...

Page 75: ...upon retest you must start at the first test and follow this section through from start to finish sequentially The following procedures check the DC power supply characteristics Parameter tested Powe...

Page 76: ...38 VDD adjust J8 VEE J9 GND J10 VDD Threshold in J22 DC in Denotes ground side of resistor 1 6 Figure 4 11 Adjustment verification fixture detail Table 4 6 Adjustment verification fixture jumper setti...

Page 77: ...t verification fixture and test equipment 1 Set the jumper positions as listed in the table Jumper Jumper name Jumper setting J13 P6434 Deskew probe setup 3 5 connected J15 Clock selection INT J16 Des...

Page 78: ...wing table Jumper Jumper name Jumper setting J13 P6434 Deskew probe setup 3 5 connected J15 Clock selection INT J16 Deskew 2 3 and 4 5 connected J17 Setup hold select HOLD J19 Clock polarity select Re...

Page 79: ...NOTE Observe proper polarity when doing the following steps See Figure 4 9 on page 4 23 to identify the ground side of the components being measured 6 Connect the CH1 probe of the oscilloscope to the...

Page 80: ...er name Jumper setting J13 P6434 Deskew probe setup 1 3 and 5 6 connected J15 Clock selection INT J16 Deskew 1 2 and 4 5 connected J17 Setup hold select HOLD J19 Clock polarity select Disconnected 2 S...

Page 81: ...oscope to J1 2 on the adjustment verifi cation fixture 5 Select Deskew from the Vertical menu NOTE Observe proper polarity when performing the following steps See Figure 4 9 on page 4 23 to identify t...

Page 82: ...probes item 4 Custom probe tip adapter see Figure 4 10 page 4 26 Prerequisites Warm up time 30 minutes for adjustment verification fixture and test equipment 1 Set the jumper positions as listed in th...

Page 83: ...sition Mode Average 90 H Repetitive Signal On 4 Connect the CH2 probe of the oscilloscope to J1 pin 2 on the adjustment verification fixture 5 Select Deskew from the Vertical menu of the oscilloscope...

Page 84: ...the setup time at R321 on the Calibration Data Report Use the following procedure to verify the external clock input Parameter tested External Clock Input Equipment required Frequency Counter item 8...

Page 85: ...Incoming data Outgoing data Internal clock frequency 50 065 MHz 01 percent 50 0600 MHz 50 0700 MHz Page 4 29 Step 2 Data Output Channel to Channel Skew 50 ps Less than 50 ps Page 4 31 Step 8 Setup Cl...

Page 86: ......

Page 87: ...ese procedures ask for the serial number of the instrument under test Before installing the modules in the mainframe record the serial number of the LA module You can also access the module serial num...

Page 88: ...e same type of individual modules for example three TLA7Q4 modules the individual modules must be separated before continuing See the Tektronix Logic Analyzer Family User Manual for instructions on se...

Page 89: ...or sequences A sequence consists of one or more individual adjustments Normally you will perform a RUN FULL SEQUENCE which executes each adjustment in the proper order The performance verification an...

Page 90: ...r user and product identification information temperature and humidity 2 If you are using P6417 or P6418 probes label one probe as the Reference Probe and the other probe as the Probe Under Test 3 If...

Page 91: ...ck that all test equipment is powered on and has the proper warm up time H Verify the adjustment verification fixture LED is lighted and the jumper positions match the on screen instructions and the e...

Page 92: ...a higher level of confidence of module functionality NOTE Performing the self calibration does not guarantee that all parameters operate within limits Operation within limits is achieved by performing...

Page 93: ...s had a 30 minute warm up before attempting the self calibration and that the logic analyzer application is running 2 Disconnect any probes connected to the LA module 3 Select Calibration and Diagnost...

Page 94: ...tem 2 Two P6417 or P6418 Logic Analyzer probes item 6 OR One P6434 Logic Analyzer probe item 7 Prerequisites Warm up time 30 minutes Test equipment connected as shown in Figure 5 2 Merged modules of t...

Page 95: ...y pin 1 to pin 1 5 Follow the on screen prompts to perform the module deskew adjustment procedure 6 Verify no failures occur for each test If desired you can print or save the results of the deskew ad...

Page 96: ...Logic Analyzer Module Adjustment Procedures 5 10 TLA7Nx TLA7Px TLA7Qx Logic Analyzer Module Service Manual...

Page 97: ...nts that meet or exceed the minimum requirements specified Adjustment Verification Fixture Adjustment Equipment Required Adjustment verification fixture and power supply item 2 Oscilloscope item 3 Two...

Page 98: ...wer supply Equipment Required DMM with test leads item 9 Prerequisites Warm up time 30 minutes for adjustment verification fixture and test equipment 2 Connect the DMM lead to J8 VEE 3 Connect the DMM...

Page 99: ...ck J16 Deskew Int Ext J15 Ext Int Clock select J19 Jumper installed clocked on falling edge Jumper removed clocked on rising edge Setup Hold J17 Hold Setup select External Clock in J5 J14 1 2 3 4 5 J1...

Page 100: ...ator item 16 Shorting jumpers item 14 Prerequisites Warm up time 30 minutes for adjustment verification fixture and test equipment 1 Set up the frequency counter as follows a Right input 10 Hz 100 MHz...

Page 101: ...nt 1 Set up the oscilloscope by pressing Setup and then press Factory Setup and then press OK Confirm Factory Init to return the oscilloscope to default conditions 2 Set up the oscilloscope as listed...

Page 102: ...n the circuit board add delay according to their length The longer the loop the more delay is added to the circuit The loops from shortest to longest add approximately 50 ps 100 ps 200 ps 400 ps and 8...

Page 103: ...e following jumpers Jumper Jumper name Jumper setting J13 P6434 Deskew probe setup 3 5 connected J15 Clock selection INT J16 Deskew 2 3 and 4 5 connected J17 Setup hold select HOLD J19 Clock polarity...

Page 104: ...1 probe to R67 P6434 A and record the positive delay between R85 and R67 using the vertical cursor bars on the oscilloscope 6 Using the delay taps on Delay CLK1 ADJ add or subtract the appropriate del...

Page 105: ...ollowing jumpers Jumper Jumper name Jumper setting J13 P6434 Deskew probe setup 1 3 and 5 6 connected J15 Clock selection INT J16 Deskew 1 2 and 4 5 connected J17 Setup hold select HOLD J19 Clock pola...

Page 106: ...sing edge on the center horizontal graticule 4 Connect the CH1 probe to R127 and record the difference in timing between R67 and R127 using the vertical cursor bars on the oscilloscope 5 Using the del...

Page 107: ...4 Shorting jumpers item 14 Prerequisites Warm up time 30 minutes for adjustment verification fixture and test equipment 1 Install the following jumpers Jumper Jumper name Jumper setting J13 P6434 Des...

Page 108: ...e Set up the Cursor menu as follows H Function V Bars f Set up the Acquire menu as follows H Acquisition Mode Sample H Repetitive Signal On 3 Using the delay taps on Delay SETUP ADJ add or subtract t...

Page 109: ...n for shipment or storage Related Maintenance Procedures The TLA7UP Mainframe Field Upgrade Instruction Manual contains some maintenance procedures not included in this manual Refer to the TLA7UP Main...

Page 110: ...as often as operating conditions require Collection of dirt on internal components can cause them to overheat and breakdown Dirt acts as an insulating blanket preventing efficient heat dissipation Di...

Page 111: ...ce defective parts Accessories Missing items or parts of items bent pins broken or frayed cables and damaged connectors Replace damaged or missing items frayed cables and defec tive modules To clean t...

Page 112: ...deionized air approximately 9 psi 2 Remove any remaining dust with a lint free cloth dampened in isopropyl alcohol 75 solution and rinse with warm deionized water A cotton tipped applicator is useful...

Page 113: ...d the General Safety Summary and Service Safety Summary found at the beginning of this manual To prevent possible injury to service personnel or damage to electrical compo nents read Preventing Electr...

Page 114: ...ejector handle to the chassis 3 Remove the injector ejector handle from the module Ejector handles 2 Remove screws 4 Figure 6 1 Injector ejector handle replacement Use the following procedure and Figu...

Page 115: ...ear of the chassis and the two rear screws located on either side of the rear panel that secure the rear panel to the chassis 3 Remove the four T 10 Torx drive screws that secure the cover to the chas...

Page 116: ...d Figure 6 4 to install the cover NOTE Install the cover tightly against the chassis This will ensure that the module fits into adjacent slots in the mainframe 1 Place the module on its right side 2 P...

Page 117: ...bracket Figure 6 3 Feeding the merge cable through the cover CAUTION To prevent damage to the module during the installation process reinstall the cover exactly as described in steps 4 through 8 If t...

Page 118: ...ront and rear chassis flanges see Figure 6 4 Leave no vertical gap Make sure tab inserts into slot on rear of front panel Figure 6 4 Seating the cover on the chassis 5 While holding the cover in place...

Page 119: ...of channels it contains H 136 channel modules contain two daughter boards H 102 channel modules contain one daughter board H 68 and 34 channel modules do not contain daughter boards See Figure 6 5 on...

Page 120: ...install the daughter boards 1 Line up the daughter board over the circuit board connector on the acquisi tion board and gently press down until the daughter board fully seats in the connector 2 Place...

Page 121: ...ove the LPU board 1 Perform the Cover removal procedure see page 6 7 2 Remove the five T 10 Torx drive screws that secure the LPU board to the chassis 3 Remove the cable bracket and unplug two 100 pin...

Page 122: ...he LPU board 1 Insert the tabs on the LPU board into the front subpanel as shown in Figure 6 7 Then set the LPU board in place on the chassis 2 Push forward on the LPU board rear connector while align...

Page 123: ...nual 6 15 Chassis Push forward on P1 connector during installation Tabs on LPU board Front subpanel slot Figure 6 7 Inserting LPU board tabs into front subpanel 4 Crimp and fold the two 100 pin ribbon...

Page 124: ...6 Perform the Cover installation procedure see page 6 8 NOTE After replacing the LPU board you must verify the proper PowerFlex level The PowerFlex configuration information is listed on the side pan...

Page 125: ...6 7 2 If there are daughter boards installed in the module perform the Daughter Boards removal procedure see page 6 11 3 Perform the Local Processor Unit Board removal procedure see page 6 13 4 Unplu...

Page 126: ...moval and Installation Procedures 6 18 TLA7Nx TLA7Px TLA7Qx Logic Analyzer Module Service Manual Unplug ribbon cables 2 Squeeze to unlock cable Figure 6 9 Removing the cables from the Acquisition boar...

Page 127: ...s that secure the merge cable connector to the chassis NOTE The 34 channel and 68 channel modules do not have a merge cable or merge cable connector For these modules ignore the steps dealing with the...

Page 128: ...he acquisition board from the chassis 8 Carefully slide the acquisition board away from the front panel until the probe connectors clear the front panel Then lift the circuit board from the chassis 9...

Page 129: ...or while aligning the acquisition board so that the mounting holes line up with the stand offs on the chassis 5 Install the nine spacer posts that secure the acquisition board to the chassis ensuring...

Page 130: ...ard F890 5 V This supply is not used F470 5 V Supplies power to External Manufacturing FLASH card Table 6 5 lists the fuse locations on the acquisition board and briefly describes the fuse functions T...

Page 131: ...DC to DC converter that 5 V powers the acquisition RAM You will need a screwdriver with a size T 10 Torx tip a soldering iron and solder wick to replace the fuses Use the following procedure and Figur...

Page 132: ...board perform the Acquisition Board installation procedure page 6 21 3 Perform the Local Processor Unit Board installation procedure see page 6 14 4 Perform the Cover installation procedure see page 6...

Page 133: ...2 Pick up each gasket at the end where the gasket finger is formed up Then rotate the gasket on As you do this lift up any fingers that bind to the chassis or cover 3 Slide each gasket gently from si...

Page 134: ...6 26 TLA7Nx TLA7Px TLA7Qx Logic Analyzer Module Service Manual 5 Perform the Daughter Boards installation procedure see page 6 12 6 Perform the installation procedure see page 6 14 7 Perform the Cover...

Page 135: ...mainframe probes and other modules as the source of the fault s 3 Perform the Troubleshoot the Logic Analyzer Module procedure beginning on page 6 31 to identify the failed replaceable part within th...

Page 136: ...Manual To eliminate benchtop or portable mainframe as problem source whichever configuration is in use Tektronix Logic Analyzer Family User Manual To remove and reinstall modules in mainframe to rein...

Page 137: ...enter H Open fuses on logic analyzer module local processor unit board H Corrupted module firmware reinstall firmware Refer to the Tektronix Logic Analyzer Family User Manual Controller does not power...

Page 138: ...ule verify that address switches on the rear of the module are set to same address as the module that you are replacing 3 Power on the logic analyzer and check for normal operation 4 If the failure sy...

Page 139: ...Module to isolate the problems within that module 4 If you have determined that the probe is faulty try to isolate the problem to an individual channel A faulty channel may indicate a faulty probe pod...

Page 140: ...operty sheet If there are no diagnostic failures when you power on the logic analyzer you can display and run the calibration and diagnostics property sheet by selecting Calibration and Diagnostics fr...

Page 141: ...e green READY indicator does not turn on the module is not being recognized which indicates possible problems on the Local Processor Unit board b Verify that after a few seconds the ACCESSED indicator...

Page 142: ...rd faulty cables or the mainframe If replacing the Acquisition board does not remedy the failures try replacing the Local Processor Unit board or the cables between the Local Processor Unit board and...

Page 143: ...jumper installed Address switches set to 00 Set switches to FF Remove jumper No Yes No Yes Yes Yes No No No Kernel tests pass No Yes Replace daughter board Replace acquisition board Yes Self calibrat...

Page 144: ...n n Acquisition board Timestamp Address Data Bus n n Memory Address Rollover n n Timestamp Rollover n n Timestamp Fast Clock n Acquisition RAM Data Bus n n Acquisition RAM Address Bus n n Timestamp A...

Page 145: ...Crossbar n n Signal Trigger Lines n n Acquisition RAM RAM Selection n n Acq Clk TS RAM n DAC n n Acquisition Address Decode n n At speed Threshold Acquire1 n At speed Async Acquire n At speed Sync Acq...

Page 146: ...ent required Verification checks LPU board Adjustment Powerflex1 Firmware level restoration2 Deskew Self Calibration Self Calibration Power on and Extended Diagnostics Acquisition board Adjustment Sel...

Page 147: ...ally As needed Verifies basic functionality After acquisition LPU or daughter board replace ment When to perform Self Calibration page 2 8 Adjustment deskew After board replacement or annually Time al...

Page 148: ...Troubleshooting 6 40 TLA7Nx TLA7Px TLA7Qx Logic Analyzer Module Service Manual...

Page 149: ...eal the shipping carton with an industrial stapler or strapping tape Shipping to the Service Center Contact the Service Center to get an RMA return material authorization number and any return or ship...

Page 150: ...will not be damaged during transit or storage Storage The TLA7Nx TLA7Px or TLA7Qx logic analyzer module should be stored in a clean dry environment The following environmental characteristics apply f...

Page 151: ...page that precedes the Table of Contents in this manual TLA7N1 TLA7N2 TLA7N3 and TLA7N4 Options Table 7 1 list options for the TLA7N1 TLA7N2 TLA7N3 and TLA7N4 modules The number of probes per probe op...

Page 152: ...uct familiarization Three years of calibration services Option C3 Provides factory calibration certification on delivery plus two more years of calibration coverage Throughout the coverage period the...

Page 153: ...TLA7Nx TLA7Px TLA7Qx Logic Analyzer Module Service Manual 8 1 Electrical Parts List Refer to the Mechanical Parts List section for a complete listing and description of replaceable parts...

Page 154: ...Electrical Parts List 8 2 TLA7Nx TLA7Px TLA7Qx Logic Analyzer Module Service Manual...

Page 155: ...e logic analyzer module Acquisition Board 100 Local Processor Unit Board LPU P2 P1 Daughter Board Daughter Board Merge P2 P1 100 100 100 16 1 16 1 16 1 16 1 16 1 16 1 16 1 16 1 50 50 J950 J550 J870 J7...

Page 156: ...face Bus P1 P2 100 Acquisition system P2 Backplane Interface Trigger Power supplies Acquisition Board Interface LPU Board Interface P1 TLA7N4 TLA7P4 and TLA7Q4 only TLA7N3 TLA7N4 TLA7P4 TLA7Q4 only Ac...

Page 157: ...nclude the following information in your order H Part number H Instrument type or model number H Instrument serial number H Instrument modification number if applicable If you order a part that has be...

Page 158: ...eference figure and index numbers to the exploded view illustrations that follow 2 Tektronix part number Use this part number when ordering replacement parts from Tektronix 3 and 4 Serial number Colum...

Page 159: ...742 METHODE ELECTRONICS INC BACKPLAIN DIVISION 7444 WEST WILSON AVE CHICAGO IL 60656 4548 50434 HEWLETT PACKARD 370 W TRIMBLE ROAD SAN JOSE CA 95131 1008 53387 3M COMPANY ELECTRONICS PRODUCTS DIV 3M A...

Page 160: ...arts List 10 4 TLA7Nx TLA7Px TLA7Qx Logic Analyzer Module Service Manual A16 A10 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 24 Figure 10 1 TLA700 Series Logic Analyzer Module ex...

Page 161: ...6 32 EXTERNAL THD NICKEL 80009 129 1478 XX 1 8 671 4214 XX 1 CIRCUIT BD ASSY 34 CH 4M 100MHZ TLA7N1 ACQUISI TION 80009 671 4214 XX 671 4215 XX 1 CIRCUIT BD ASSY 68 CH 4M 100MHZ TLA7N2 ACQUISI TION 80...

Page 162: ...9631 XX 334 9632 XX 1 MARKER IDENT LABEL MKD TLA7P2 TOP INJECTOR EJECTOR 0 010 POLY GE LEXAN 0KB05 334 9632 XX 334 9633 XX 1 MARKER IDENT LABEL MKD TLA7P4 TOP INJECTOR EJECTOR 0 010 POLY GE LEXAN 0KB0...

Page 163: ...DESCR OPTIONAL ACCESSORIES 071 0912 XX 1 MANUAL TECH SERVICE TLA721 BENCHTOP TLA7XM EXPANSION MAINFRAME 80009 071 0912 XX 071 0913 XX 1 MANUAL TECH SERVICE TLA715 PORTABLE MAINFRAME 80009 071 0913 XX...

Page 164: ...Mechanical Parts List 10 8 TLA7Nx TLA7Px TLA7Qx Logic Analyzer Module Service Manual 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Figure 10 2 TLA700 Series LPU board exploded view...

Page 165: ...LD 3 0A TRIP AT 20 DEG C 30V MAX SMD150 06090 SMD150 2 2 7 159 5018 XX 1 TLA7N1 7N2 FUSE 3 0A 125V FAST BLOW 0 1 X 0 1 X 0 24 UL REG CSA CERT T R 75915 R451 003 2 8 131 3692 XX 2 RETENTION HIGH TEMP 9...

Page 166: ...Mechanical Parts List 10 10 TLA7Nx TLA7Px TLA7Qx Logic Analyzer Module Service Manual 1 2 3 4 5 6 7 8 9 2 5 Figure 10 3 TLA700 Series Acquisition board exploded view...

Page 167: ...RD 4 SIDES CTR PLZ LATCHING W O BDRETENTION 30 GOLD 00779 146144 3 3 6 131 3363 XX 4 TLA7N2 7N3 7N4 7P2 7P4 7Q2 7Q4 CONN HDR PCB MALE RTANG 2 X 17 0 1CTR 53387 N2534 5002UB 2 TLA7N1 CONN HDR PCB MALE...

Page 168: ...01 1 CKT BD ASSY DESKEW TEST FIXTURE A14 80009 671 3599 01 12 150 5009 00 1 DIODE OPTO LED HI EFFIC RED 626NM 3 4MCD AT 10MA 50434 HLMP 6305 021 13 159 5009 00 1 FUSE SMD 1 5A 125V FAST BLOW 0 1 X 0...

Page 169: ...Mechanical Parts List TLA7Nx TLA7Px TLA7Qx Logic Analyzer Module Service Manual 10 13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Figure 10 4 Adjustment verification fixture exploded view...

Page 170: ...Mechanical Parts List 10 14 TLA7Nx TLA7Px TLA7Qx Logic Analyzer Module Service Manual...

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