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Theory of Operation—2246 1Y and 2246 Mod A Service
Data Buffers
BUS 0 BIDIRECTIONAL BUFFER.
Buffer U2515
communicates the serial bit data to and from the
Measurement Processor.
Seven data lines of the
eight available are used in this application. The
remaining one is connected to the +5 V supply to
prevent random states and noise from affecting the
other data lines in the device. The buffer is enabled
via U2503B when both pins 38 (MCSO) and 39 (DEN)
of the Processor are low. The direction of transfer is
controlled by the DT/R output of the processor.
BUS 1 BIDIRECTIONAL DATA BUFFER.
Data com
munication to and from the Measurement Processor
is via Buffer U2514. Direction of the data transfer is
controlled by the DT/R (Data Transmit/Received)
output from the Measurement Processor. Data
enabling occurs when pin 39 (DEN) goes low while
pin 38 (MCSO) is high.
BUS ARBITRATION GATES.
The Bus Arbitration
logic (U2503A and B, and U2506D) controls which
Bus Buffer is enabled for communication with the
Measurement Processor.
This control logic is
necessary since both buffers cannot be active at the
same time. Bus 1 (U2514) is the eight-bit data com
munication bus, and Bus 0 (U2515) uses seven bits
to communicate single-bit data to the Measurement
Processor. On the Bus 0 ADO signal line, the
Measurement Processor sends the serial MB DATA
to each of the operating mode Shift Registers and to
SLIC (U600) and FLIC (U602). Additional arbitration
is provided by U2503C to produce a SLIC RD strobe
when the Measurement Processor wants to read the
status of the Display Controller.
Table 3-26
Measurement Processor Signals
Signal Name
Signal Function
SYS RESET
Master reset for the Processor board.
CLK 8M
8 MHz clock for the Readout Processor.
AD0-AD7
Multiplexed address/data lines for the Measurement Processor.
A8-A15
Address lines for the Measurement Processor.
A16-A17
Multiplexed address/status lines.
D0-D7
Data lines for Bus 1 (to memory and readout).
ADDR3-ADDR0
Latched addresses to Main board.
RO INTR
Indicates the Readout System is busy when asserted.
MB RETURN
Return data from the Main board Shift Register 2.
SW BD DATA
Data from the switch board.
AD COMP
Output of the A -to -D Converter Comparator, U2306.
MB DATA
Bidirectional data line to/from the Main board.
TB CAL
Tim e-base calibration signal to trigger circuit.
3-44
Summary of Contents for 2246 1Y
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