Tektronix 2246 1Y, Service Manual

Page: 64 / 433

Theory of Operation—2246 1Y and 2246 Mod A Service
DLY2: Input from second delay comparator.
This com parator normally switches from low
to high after the end of the second sweep
delay (in dual-delay mode).
B TRIG: B Sweep trigger input.
M G E : Measurement gate enable input from
the Display Logic 1C. Active low.
MSEL: Measurement select input. MSEL=1
causes the DLY12 signal rising edges to
sample the B TRIG input in strobed volts
measurements. MSEL=0 selects the DLY2
signal rising edges.
DS: Delay select signal from the Display
Logic 1C. DS=1 selects first delay.
DATA: Data input to the internal, control
shift register.
SI : Crt beam -intensity control output.
Turns on the beam current for the A Sweep
displays. Active low.
S 2 : Crt beam -intensity control output.
Turns on the beam current for the B Sweep
displays. Active low.
S 3 : Crt beam -intensity control output.
Turns on the beam current for the A Sweep
intensified zone displays. Active low.
S 4 : Crt beam -intensity control output.
Turns on the beam current for the Readout
displays. Active low.
A GATE: A Sweep gate output. Starts the A
Sweep ramp. Active high.
TDO: Trigger data output. Data to be read is
selected via the A1 and AO inputs (see
Table 3-1 7).
B GATE: B Sweep gate output. Starts the B
Sweep ramp. Active high.
BUB : B Sweep unblanking output. Active
low.
C GATE : Measurement gate output. Not
used externally in the 2246 1Y and 2246 Mod
A.
Table 3-17
Trigger Logic IC Addressing Logic
A1 AO Output of TDO pin
Action when
SIN Strobed
0
0 Strobed Volts Latch
DATA clocked
into Control Reg
0 1 Auto baseline Latch Resets Auto base­
line Latch
1 0
A Trigger Latch Resets A Trigger
Latch
1 1
Peak Volts Latch Resets Peak Volts
Latch
Trigger Logic IC Control Register Description
The control register of U602 is an 8 -b it shift register
that receives input from the DATA pin. Bit 1 receives
the data on a low -to-high transition on the SIN pin
(A1 = AO = 0). Bit 8 receives this data after seven
more low -to-high transitions on the SIN pin. Bit 8 is
the most significant bit of the control register. Table
3-18 lists the control signal name associated with
each control register bit.
DM1, DM0: These bits select the delay
mode (see Table 3-19).
BRUN: This bit determines whether the B
Sweep is in RUNS AFTER delay mode or Trig­
gered After delay mode. BRUN=1 selects
RUNS AFTER Mode.
PM1, PMO: These bits select the peak volts
detection mode as shown in Table 3-20.
3-27