Stanford Research Systems SR844, User Manual

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SR844 Basics 2-11
SR844 RF Lock-In Amplifier
IF Section
The mixer outputs contain the in-phase and quadrature components of the input signal,
[shifted to the IF (chopping) frequency (2–12 kHz)] as well as unwanted high-frequency
mixer outputs and contributions from interfering signals and input noise. The IF section
has identical signal paths for the in-phase and quadrature signals.
180 kHz Low Pass Filter
This passive filter eliminates much of the high-frequency mixer output, principally in
order to keep RF out of the subsequent low-frequency amplifier and filter stages. This
filter removes the 2f
ref
mixer output for most reference frequencies.
Gain Stages
A variable IF gain section provides the gain necessary to detect very weak signals. The
instrument sets the variable gain appropriate to the IF (close) dynamic reserve mode and
overall sensitivity.
Anti-Aliasing Filter
Digital sampling causes aliasing, where analog signals at high frequencies appear as
digital signals at low frequencies. In general, if the signal is sampled at F
S
, any input
signal at a frequency above F
S
/2 will be aliased into the interval [0,F
S
/2]. The purpose of
the anti-aliasing filter is to remove any IF signals above F
S
/2 before digitization.
The anti-aliasing filter is a 7th order active Cauer filter with a corner at 18 kHz. This filter
is removed when no output filtering is selected.
16-Bit ADC
The analog-to-digital converters (ADCs) digitize the IF outputs for the digital signal
processor (DSP) for further processing. The sampling rate varies between 48–96 kHz.
The sampling clock comes from the divider chain in the reference channel and is
synchronous with the reference frequency.