Stanford Research Systems SR844, User Manual

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2-10 SR844 Basics
SR844 RF Lock-In Amplifier
Reference Channel
The SR844 accepts sinusoidal and digital signals as external reference inputs, including
low duty-cycle pulse trains. The nominal input levels are 0 dBm sine or 0.7 Vpp pulse.
Larger levels are acceptable. The reference input may be terminated in either 50
Ω
or
10 k
Ω€||€
40 pF.
Auto-Threshold Comparator
The auto-threshold circuit detects the maximum and minimum voltages of the waveform
and sets the threshold level to the mean of these two voltages. The SR844 uses the
positive transitions through the threshold voltage as its phase reference.
Phase Locked Loop and Divider Chain
The Phase Comparator, Loop Filter, Error Amplifier, VCO and Divider Chain form a
classic Phase Locked Loop (PLL). When the output edges of the Divider Chain coincide
with the output edges of the Auto-Threshold Comparator, the loop is phase-locked.
In the SR844, the VCO always runs between 200 and 400 MHz. The divider chain does
successive divide by 2 all the way down to 24.4 to 48.8 kHz. In this way, any frequency
within the SR844 operating range can be generated by selecting the appropriate tap from
the chain. In addition, the IF (chopping) frequency is generated synchronously by dividing
the lowest frequency tap (24–49 kHz) by 3, 4, 12 or 16. The chopping frequency is
between 2–3 kHz for time constants of 1 ms and above, and between 8–12 kHz for 100
and 300
µ
s time constants as well as No Filter.
20 MHz Reference/ Synthesizer
In internal reference mode, these components replace the external reference input to the
phase locked loop discussed above. The synthesizer chip is a phase comparator that can
be programmed to lock when the two inputs (the VCO and the 20 MHz crystal reference)
are phase-locked at a particular frequency ratio (for example, VCO/194 = 20 MHz/17).
The frequency in internal mode is set by programming the appropriate ratio into the
synthesizer chip.
Important!
The SR844 provides 3 digits of resolution in setting the internal mode frequency. Because
of the nature of the fractional arithmetic involved it is not possible to generate the exact
frequencies with such a simple configuration. However, the frequency error is less than
0.1 in the 3rd digit. For example, entering an internal frequency of 267 kHz on the front
panel results in a frequency between 266.9 and 267.1 kHz.
X and Y Reference Generator
The divider chain generates the X and Y square wave reference signals, 90
°
out of phase
at the reference frequency. These signals are mixed with the IF chopping signal to produce
the chopped reference signals to the X (in-phase) and Y (quadrature) mixers. The IF
chopping signal is passed to the Digital Signal Processor (DSP) to provide the IF
reference.