Spectrum M2p.59 Series, Hardware Manual, Page: 19 / 190

Introduction Hardware information
(c) Spectrum Instrumentation GmbH 19
Technical Data
Only figures that are given with a maximum reading or with a tolerance reading are guaranteed specifications. All other figures are typical characteristics that are given for
information purposes only. Figures are valid for products stored for at least 2 hours inside the specified operating temperature range, after a 10 minute warm-up, after run -
ning an on-board calibration and with proper cooled products. All figures have been measured in lab environment with an environmental temperature between 20°C and
25°C and an altitude of less than 100 m.
Analog Inputs
Trigger
Resolution 16 bit (can be reduced to acquire simultaneous digital inputs)
Input Range software programmable ±200 mV, ±500 mV, ±1 V, ±2 V, ±5 V, ±10 V
Input Type software programmable Single-ended or True Differential
Input Offset (single-ended) software programmable programmable to ±100% of input range in steps of 1%
ADC Differential non linearity (DNL) ADC only 591x:
592x:
593x, 8x3:
594x:
596x, 8x6:
±0.2/±0.8 LSB (typ./max.)
±0.2/±0.8 LSB (typ./max.)
±0.5/±0.9 LSB (typ./max.)
±0.5/±0.9 LSB (typ./max.)
±0.5/±0.9 LSB (typ./max.
ADC Integral non linearity (INL) ADC only 591x:
592x:
593x, 803, 813:
594x:
596x, 806, 816:
±1.0/±2.3 LSB (typ./max.)
±1.0/±2.3 LSB (typ./max.)
±2.0/±7.5 LSB (typ./max.)
±2.0/±7.5 LSB (typ./max.)
±2.0/±7.5 LSB (typ./max.)
Offset error (full speed), DC signal after warm-up and calibration  0.1% of range
Gain error (full speed), DC signal after warm-up and calibration  0.1% of reading
Offset temperature drift after warm-up and calibration typical 5 ppm/°K
Gain temperatur drift after warm-up and calibration typical 45 ppm/°K
AC accuracy 1 kHz signal  0.3% of reading
AC accuracy 50 kHz signal  0.5% of reading
Crosstalk: Signal  MHz, 50

range  ±1V
range  ±2V
 95 dB on adjacent channels
 90 dB on adjacent channels
Crosstalk: Signal  MHz, 50

range  ±1V
range  ±2V
 87 dB on adjacent channels
 85 dB on adjacent channels
Analog Input impedance software programmable
50

/1 M

|| 30 pF
Analog input coupling fixed DC
Over voltage protection range  ±1V
±5 V (1 M

), 3.5 Vrms (50

Over voltage protection range  ±2V
±50 V (1 M

), 5 Vrms (50

Anti-Aliasing Filter (digital filtering active) 591x (5 MS/s) Digital Anti-Aliasing filter at 40% of sampling rate. Examples:
5 MS/s sampling rate -> anit-aliasing filter at 2 MHz
1 MS/s sampling rate -> anti-aliasing filter at 400 kHz
Anti-Aliasing Filter (standard) 591x (5 MS/s)
592x (20 MS/s)
593x (40 MS/s)
594x (80 MS/s)
596x (125 MS/s)
fixed 2.5 MHz 3rd order butterworth alike
fixed 10 MHz 3rd order butterworth alike
fixed 20 MHz 3rd order butterworth alike
fixed 40 MHz 3rd order butterworth alike
fixed 60 MHz 3rd order butterworth alike
CMRR (Common Mode Rejection Ratio) range  ±1V 100 kHz: 75 dB, 1 MHz: 60 dB, 10 MHz: 40 dB
CMRR (Common Mode Rejection Ratio) range  ±2V 100 kHz: 55 dB, 1 MHz: 52 dB, 10 MHz: 50 dB
Maximum Common Mode Voltage
Differential Input
Input Range
VCM
±200 mV
±900 mV
±500 mV
±2.25 V
±1 V
±2.25 V
±2 V
±9 V
±5 V
±22.5 V
±10 V
±22.5 V
Channel selection (single-ended inputs) software programmable 1, 2, 4 or 8 channels (maximum is model dependent)
Channel selection (true differential inputs) software programmable 1, 2 or 4 channels (maximum is model dependent)
Calibration Internal Self-calibration is done on software command and corrects against the onboard references. Self-
calibration should be issued after warm-up time.
Calibration External External calibration calibrates the onboard references used in self-calibration. All calibration
constants are stored in nonvolatile memory.
A yearly external calibration is recommended.
Available trigger modes software programmable Channel Trigger, External, Software, Window, Pulse, Re-Arm, Spike, Or/And, Delay
Channel trigger level resolution software programmable 16 bit
Trigger edge software programmable Rising edge, falling edge or both edges
Trigger pulse width software programmable 0 to [4G - 1] samples in steps of 1 sample
Trigger delay software programmable 0 to [4G - 1] samples in steps of 1 samples
Trigger holdoff (for Multi, ABA, Gate) software programmable 0 to [4G - 1] samples in steps of 1 samples
Multi, ABA, Gate: re-arming time  40 samples (+ programmed pret programmed holdoff)
Pretrigger at Multi, ABA, Gate, FIFO software programmable 8 up to [32 kSamples / number of active channels] in steps of 8
Posttrigger software programmable 8 up to [8G - 4] samples in steps of 8 (defining pretrigger in standard scope mode)
Memory depth software programmable 16 up to [installed memory / number of active channels] samples in steps of 8
Multiple Recording/ABA segment size software programmable 8 up to [installed memory / number of active channels] samples in steps of 8
Internal/External trigger accuracy 1 sample
Timestamp modes software programmable Standard, Startreset, external reference clock on X1 (e.g. PPS from GPS, IRIG-B)
Data format Std., Startreset: 64 bit counter, increments with sample clock (reset manually or on start)
RefClock: 24 bit upper counter (increment with RefClock)
40 bit lower counter (increments with sample clock, reset with RefClock)
Extra data software programmable none, acquisition of X1/X2/X3 inputs at trigger time, trigger source (for OR trigger)
Size per stamp 128 bit = 16 bytes
External trigger Ext X1, X2, X3
External trigger type Single level comparator 3.3V LVTTL logic inputs