Spectrum M2p.59 Series, Hardware Manual, Page: 164 / 190

164 (c) Spectrum Instrumentation GmbH
Reading out the timestamps Timestamps
The above mentioned „Extra Data Word“ contains the following 48bit wide data, depending on the selected timestamp data format:
The multi-purpose lines X19...X4 are only available when the additional digital I/O option (either DigSMB or
DigFX2) is installed. For cards where this option is not installed, Bits 47 down to 32 are always zero.
The trigger sources are encoded as follows:
Selecting the timestamp data format
The selection between the different data format for the timestamps is done with a flag that is written to the timestamp command register. As
this register is organized as a bitfield, the data format selection is available for all possible timestamp modes and different data modes can
be combined.
Timestamp Data Format Bit
47
... Bit
32
Bit
31
... Bit
29
Bit
28
... Bit
16
Bit
15
... Bit
13
Bit
12
Bit
11
Bit
10
... Bit
0
no special data format is set 0h
SPC_TSXIOACQ_ENABLE X19 .. X4 (option) 0h X3 .. X1 0h
SPC_TSFEAT_TRGSRC 0h Trigger source bit -
mask (X3, X2, X1)
(see table below)
0h Trigger source bit -
mask (Ch0 .. Force)
(see table below)
SPC_TSXIOACQ_ENABLE | SPC_TS -
FEAT_TRGSRC
X19 .. X4 (option) Trigger source bit -
mask (X3, X2, X1)
(see table below)
0h X3 .. X1 0h Trigger source bit -
mask (Ch0 .. Force)
(see table below)
SPC_TRGSRC_MASK_CH0 1h Set when a trigger event occurring on channel 0 was leading to final trigger event.
SPC_TRGSRC_MASK_CH1 2h Set when a trigger event occurring on channel 1 was leading to final trigger event.
SPC_TRGSRC_MASK_CH2 4h Set when a trigger event occurring on channel 2 was leading to final trigger event.
SPC_TRGSRC_MASK_CH3 8h Set when a trigger event occurring on channel 3 was leading to final trigger event.
SPC_TRGSRC_MASK_CH4 10h Set when a trigger event occurring on channel 4 was leading to final trigger event.
SPC_TRGSRC_MASK_CH5 20h Set when a trigger event occurring on channel 5 was leading to final trigger event.
SPC_TRGSRC_MASK_CH6 40h Set when a trigger event occurring on channel 6 was leading to final trigger event.
SPC_TRGSRC_MASK_CH7 80h Set when a trigger event occurring on channel 7 was leading to final trigger event.
SPC_TRGSRC_MASK_EXT0 100h Set when a trigger event occurring on external trigger(Ext0) was leading to final trigger event.
SPC_TRGSRC_MASK_FORCE 400h Set when a trigger event occurring by using the force trigger command is leading to final trigger event.
SPC_TRGSRC_MASK_X1 20000000h Set when a trigger event occurring on TTL trigger(X1) is leading to final trigger event.
SPC_TRGSRC_MASK_X2 40000000h Set when a trigger event occurring on TTL trigger(X2) is leading to final trigger event.
SPC_TRGSRC_MASK_X3 80000000h Set when a trigger event occurring on TTL trigger(X3) is leading to final trigger event.
Register Value Direction Description
SPC_TIMESTAMP_CMD 47000 read/write Programs a timestamp mode and performs commands as listed below
SPC_TSXIOACQ_ENABLE 1000h Enables the trigger synchronous acquisition of the X1...X19 inputs with every stored timestamp in the upper 64 bit.
SPC_TSFEAT_TRGSRC 80000h Enables the storage of the trigger source in the upper 64 bit of the timestamp value.