Spectrum M2p.59 Series, Hardware Manual, Page: 113 / 190

Trigger modes and appendant registers Channel Trigger
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If you want to set up a two channel board to detect only a positive edge on channel 0, you would have to setup the board like the following
example. Both of the examples either for the single trigger source and the OR trigger mode do not include the necessary settings for the trigger
levels. These settings are detailed described in the following paragraphs.
If you want to set up a two channel board to detect a trigger event on either a positive edge on channel 0 or a negative edge on channel 1
you would have to set up your board as the following example shows.
Channel trigger level
All of the channel trigger modes listed above require at least one trigger level to be set (except SPC_TM_NONE of course). Some modes like
the window triggers require even two levels (upper and lower level) to be set.
After the data has been sampled, the upper N data bits are compared with the N bits of the trigger levels. The following table shows the level
registers and the possible values they can be set to for your specific card.
As the trigger levels are compared to the digitized data, the trigger levels depend on the channels input range. For every input range available
to your board there is a corresponding range of trigger levels. On the different input ranges the possible stepsize for the trigger levels differs
as well as the maximum and minimum values. The table further below gives you the absolute trigger levels for your specific card series.
16 bit resolution for the trigger levels:
SPC_TM_SPIKE 00000200h Enables the spike trigger mode.
SPC_TM_WINENTER | SPC_TM_P -
W_GREATER
04000020h Enables the window trigger for long inner signals
SPC_TM_WINLEAVE | SPC_TM_P -
W_GREATER
04000040h Enables the window trigger for long outer signals
SPC_TM_WINENTER | SPC_TM_P -
W_SMALLER
02000020h Enables the window trigger for short inner signals
SPC_TM_WINLEAVE | SPC_TM_P -
W_SMALLER
02000040h Enables the window trigger for short outer signals
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_ORMASK, SPC_TMASK_NONE); // disable software trigger
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_CH_ORMASK0, SPC_TMASK0_CH0); // Enable channel 0 in the OR mask
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_CH0_MODE, SPC_TM_POS ); // Set triggermode of channel 0 to positive edge
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_ORMASK, SPC_TMASK_NONE); // disable software trigger
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_CH_ORMASK0, SPC_TMASK0_CH0 | SPC_TMASK0_CH1); // Enable channel 0 + 1
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_CH0_MODE, SPC_TM_POS ); // Set triggermode of channel 0 to positive edge
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_CH1_MODE, SPC_TM_NEG ); // Set triggermode of channel 1 to negative edge
Table 70: Spectrum API: channel trigger level registers
Register Value Direction Description Range
SPC_TRIG_CH0_LEVEL0 42200 read/write Trigger level 0 channel 0: main trigger level / upper level if 2 levels used -32767 to +32767
SPC_TRIG_CH1_LEVEL0 42201 read/write Trigger level 0 channel 1: main trigger level / upper level if 2 levels used -32767 to +32767
SPC_TRIG_CH2_LEVEL0 42202 read/write Trigger level 0 channel 2: main trigger level / upper level if 2 levels used -32767 to +32767
SPC_TRIG_CH3_LEVEL0 42203 read/write Trigger level 0 channel 3: main trigger level / upper level if 2 levels used -32767 to +32767
SPC_TRIG_CH4_LEVEL0 42204 read/write Trigger level 0 channel 4: main trigger level / upper level if 2 levels used -32767 to +32767
SPC_TRIG_CH5_LEVEL0 42205 read/write Trigger level 0 channel 5: main trigger level / upper level if 2 levels used -32767 to +32767
SPC_TRIG_CH6_LEVEL0 42206 read/write Trigger level 0 channel 6: main trigger level / upper level if 2 levels used -32767 to +32767
SPC_TRIG_CH7_LEVEL0 42207 read/write Trigger level 0 channel 7: main trigger level / upper level if 2 levels used -32767 to +32767
SPC_TRIG_CH0_LEVEL1 42300 read/write Trigger level 1 channel 0: auxiliary trigger level / lower level if 2 levels used -32767 to +32767
SPC_TRIG_CH1_LEVEL1 42301 read/write Trigger level 1 channel 1: auxiliary trigger level / lower level if 2 levels used -32767 to +32767
SPC_TRIG_CH2_LEVEL1 42302 read/write Trigger level 1 channel 2: auxiliary trigger level / lower level if 2 levels used -32767 to +32767
SPC_TRIG_CH3_LEVEL1 42303 read/write Trigger level 1 channel 3: auxiliary trigger level / lower level if 2 levels used -32767 to +32767
SPC_TRIG_CH4_LEVEL1 42304 read/write Trigger level 1 channel 4: auxiliary trigger level / lower level if 2 levels used -32767 to +32767
SPC_TRIG_CH5_LEVEL1 42305 read/write Trigger level 1 channel 5: auxiliary trigger level / lower level if 2 levels used -32767 to +32767
SPC_TRIG_CH6_LEVEL1 42306 read/write Trigger level 1 channel 6: auxiliary trigger level / lower level if 2 levels used -32767 to +32767
SPC_TRIG_CH7_LEVEL1 42307 read/write Trigger level 1 channel 7: auxiliary trigger level / lower level if 2 levels used -32767 to +32767