SONIX SN32F107, User Manual

Page: 45 / 184

SN32F100 Series
32-Bit Cortex-M0 Micro-Controller
SONiX TECHNOLOGY CO., LTD
Page 45
Version 1.9
3.2.2 PLL
SN32F100 series MCU uses the PLL to create the clocks for the core and peripherals. The input frequency range is
10MHz to 25MHz. The input clock is divided down and fed to the Phase-Frequency Detector (PFD). This block
compares the phase and frequency of its inputs, and generates a control signal when phase and/ or frequency do not
match. The loop filter filters these control signals and drives the voltage controlled oscillator (VCO), which generates
the main clock and optionally two additional phases. The VCO frequency range is 156MHz to 320MHz. These clocks
are divided by P by the programmable post divider to create the output clock(s). The VCO output clock is then divided
by M by the programmable feedback divider to generate the feedback clock. The output signal of the phase-frequency
detector is also monitored by the lock detector, to signal when the PLL has locked on to the input clock.
The PLL settling time is 100
μs.
PFD LPF VCO
DIV
M
DIV
P
Fclkout
Fvco Fclkin
DIV
F
3.2.2.1 PLL Frequency selection
The PLL frequency equations:
F
VCO
= F
CLKIN
/ F * M
F
CLKOUT
= F
VCO
/ P
The PLL frequency is determined by the following parameters:

F
CLKIN
: Frequency from the PLLCLKSEL multiplexer.

F
VCO
: Frequency of the Voltage Controlled Oscillator (VCO); 156 to 320 MHz.

F
CLKOUT
: Frequency of PLL output.

P: System PLL post divider ratio, controlled by PSEL bits in PLL control register (SYS0_PLLCTRL) .

F: System PLL front divider ratio, controlled by FSEL bits in PLL control register (SYS0_PLLCTRL) .

M: System PLL feedback divider ratio, controlled by MSEL bits in PLL control register (SYS0_PLLCTRL).
To select the appropriate values for M, P, and F, it is recommended to follow these constraints:
1.
10MHz ≤ F
CLKIN
≤ 25MHz
2.
150MHz ≤ F
VCO
≤ 330MHz
3.
2 < M ≤31
4. F = 1, or 2
5. P = 6, 8, 10, 12, or 14
(duty 50% +/- 2.5%)
6. F
CLKOUT
= 20MHz, 30MHz, 40MHz, 50MHz, 24MHz, 36MHz, 48MHz, 32MHz, 22MHz, 24MHz, 50MHz
with jitter < ±500 ps