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Device Specifications
Semiconductor Group
252
A/D Converter Characteristics
V
CC
= 5 V
±
10 %;
V
SS
= 0 V;
V
AREF
=
V
CC
±
5 %;
V
AGND
=
V
SS
±
0.2 V;
V
I ntAREF
–
V
I ntAGND
≥
1 V;
T
A
= 0 to 70 °C for SAB 80C515/80C535
T
A
= – 40 to 85 °C for SAB 80C515/80C535-T40/85
Parameter
Symbol
Limit values
Unit
Test condition
min.
typ.
max.
Analog input voltage
V
AINPUT
V
AGND
–
0.2
–
V
AREF
+
0.2
V
9)
Analog input
capacitance
C
I
– 25
45
pF
7)
Load time
t
L
– –
2
t
CY
µ
s
–
Sample time
(incl. load time)
t
S
– –
7
t
CY
µ
s
–
Conversion time
(incl. sample time)
t
C
– –
13
t
CY
µ
s
–
Total unadjusted
error
TUE
–
±
1
±
2
LSB
V
I ntAREF
=
V
AREF
=
V
CC
V
I ntAGND
=
V
AGND
=
V
SS7)
V
AREF
supply current
I
REF
– –
5
mA
8)
Internal reference error
V
I nt REFERR
–
±
30
mV
8)
7)
The output impedance of the analog source must be low enough to assure full loading
of the sample capacitance (
C
I ) d uring load time
(t
L ) . After charging of the internal
capacitance (
C
I
) i n the load time
(t
L ) the analog input must be held constant for the rest
of the sample time
(t
S )
8)
The differential impedance
r
D
of the analog reference voltage source must be less than
1 k
Ω
at reference supply voltage.
9)
Exceeding these limit values at one or more input channels will cause additional
current which is sinked / sourced at these channels. This may also affect the accuracy
of other channels which are operated within these specifications.
*
Summary of Contents for SAB 80515 Series
Page 9: ...Semiconductor Group 9 Introduction Figure 1 2 Block Diagram ...
Page 12: ...Semiconductor Group 12 Fundamental Structure Figure 2 1 Detailed Block Diagram ...
Page 18: ...Semiconductor Group 18 Central Processing Unit Figure 3 1 Fetch Execute Sequence ...
Page 73: ...Semiconductor Group 73 On Chip Peripheral Components Figure 7 25 A D Converter Block Diagram ...
Page 83: ...Semiconductor Group 83 On Chip Peripheral Components Figure 7 33 a Timer 2 Block Diagram ...
Page 215: ...Device Specifications Semiconductor Group 215 ...
Page 217: ...Device Specifications Semiconductor Group 217 Pin Configuration P LCC 68 ...
Page 219: ...Device Specifications Semiconductor Group 219 Logic Symbol ...
Page 226: ...Device Specifications Semiconductor Group 226 Figure 1 Block Diagram ...
Page 229: ...Device Specifications Semiconductor Group 229 Figure 2 Memory Address Spaces ...
Page 239: ...Device Specifications Semiconductor Group 239 Figure 4 Block Diagram of the A D Converter ...
Page 241: ...Device Specifications Semiconductor Group 241 Figure 5 Interrupt Request Sources ...
Page 242: ...Device Specifications Semiconductor Group 242 Figure 6 Interrupt Priority Level Structure ...