Samsung OFFICESERV 7100, Service Manual

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OfficeServ 7100 Service Manual
© SAMSUNG Electronics Co., Ltd.
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QDMC (STI9511)
As the ASIC chip that controls QDASL, QDMC has the following features:
y
Universal Asynchronous Receiver & Transmitter(UART) data exchanged for D channel
y
Programmable UART speed: 2 K/4 K/8 K/16 Kbps
y
B channel supports bypass interface function
y
One QDMC controls two TP34042 chips.(Total 16 channels can be used.)
Figure 2.19 QDMC Block Diagram
2.5.10 8DLI Board
The 8DLI board provides 8 ports and can be connected to digital phones. One port uses a
transmittance element that enables interfacing of 2B+D(two voice channels of 64 kbps and
one signal channel of 16 kbps).
For signal transmittance, the code transmittance method of Alternative Marking Inversion(AMI)
in a full-duplex method of 144 kbps is used. Voice and data channels are available for end-
to-end communications. The actual transmittance rate from the 8DLI board to the digital
phone is 192 kbps. 16 kbps from 48 kbps where 144 kbps of 2B+D above is excluded is
used for synchronization and remaining 32 kbps is used for transferring null data.
Lines of AWG 26 thick are used as transmittance lines between the DLI board and digital
phone and maximum transmittance distance is 400 m. The DLI board supplies the power of
-48 V to the phone and is configured with the poly switch that disconnects over-current and
circuits for digital interfaces. This board controls -48 V of power on or off through the FET
inside of the 8DLI board.
Micro
Processor
Interface
D-chnnel
Data control
Speed
Selection
D-ch
Rx
D-ch
Tx
Clock
Generator
Port & Timing control
/generator
Micro-channel control
Interrupt
Control