Samsung OFFICESERV 7100, Service Manual

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OfficeServ 7100 Service Manual
© SAMSUNG Electronics Co., Ltd.
2-21
2.5.5.2 Major Features
The major features of the TEPRI2 board are as follows:
Line Interface
y
Selectable T1/E1 signaling by programming
y
Register design to satisfy T1(100 Ω ) and E1(120 Ω ) impedances simultaneously
y
Surge protection according to ITU recommendation
y
Output port protection by a line monitor
y
Jitter characteristics satisfying ITU-T I.431 and G703
y
Selectable line coding method(HDB3, AMI)
y
Loss Of Signal(LOS) threshold setting
y
Local loop and remote loop supported
y
Use of DPLL to recover data and clocks
y
HDLC and Channel Associated Signaling(CAS) via Common Channel Signaling(CCS)
CPU (MPC852T)
This is the main processor and MPC852TZT50 by Motorola Inc. is used for this.
The the data bus of this CPU is used in 32-bit mode.
The main specifications of MPC852T are as follows:
y
Embedded Power PC core
y
4-Kbyte Data cache and 4-Kbyte Instruction cache
y
Memory Management Unit(MMU)
y
32-bit Dynamic Bus Controller
y
32-bit Address Lines
y
Memory controller(8 banks)
y
Fast Ethernet Controller
y
Two 16-bit timer and one 32-bit timer
y
System Integration Unit function embedded
y
Seven external interrupts and 18 internal interrupts
y
2-baud rate Generator
y
Two SCCs for HDLC communication
y
One SMC for asynchronized communication
y
Built-in MAC supporting 10/100 Mbps LAN
y
Debug interface
y
1.8 V Core and 3.3 V I/O operation with 5 V TTL compatibility