PCD0
Technical data’s and circuit diagrams for the modular system
Page 86
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SAIA-Burgess Controls Ltd.
(HB_PCD0 26 766_E2.DOC)
26/766 E2
4.18.3
Terminal assignment RIO C24-10
Terminal assignment 4 counters 16 bits
4 counters with 16 bits each
Counter
Clock pulse+
Input c)
Clock pulse-
(Input counter –)
Gate (enable inputs)
Signal outputs
(default setting iOFF)
1
X1.0
X1.2
X1.4
X1.6 Threshold comparison
2
X1.1
X1.3
X1.5
X1.7 Threshold comparison
3
X2.0
X2.2
X2.4
X2.6 Threshold comparison
4
X2.1
X2.3
X2.5
X2.7 Threshold comparison
Terminal assignment 2 counters 32 bits
Terminal assignment for 2 counters with 32 bits each
Counter
Clock pulse+
Input c)
Clock pulse-
(Input counter –)
Gate (enable inputs)
Signal outputs
(default setting OFF)
1
X1.0
X1.2
X1.4
X1.6 Threshold comparison 1
X1.7 Threshold comparison 2
2
X2.0
X2.2
X2.4
X2.6 Threshold comparison 1
X2.7 Threshold comparison 2
Clock pulse+
Clock pulse-
Gate
Counter is incremented at rising edge:
Counter is decremented at rising edge:
0 (0 V): Counter disabled, 1 (24 V): Counter enabled
The clock pulse- terminal can be used more than once (see optional
functions)
4.18.4
Data width RIO C24-10
Input
Output
Data width in words
5 or 3*
5 or 3*
*If only 1 32 bit counter or 2 16 bit counters are used the data width to
be transferred can be reduced to 3 words. The data width is set using
service function 13 on the bus coupler.
If the data width is 3 words word 3 and 4 are not transmitted. Word 5
will be transmitted as word 3.
