Renesas 7700 FAMILY, User Manual

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7751 Group User’s Manual
7–35
SERIAL I/O
7.4 Clock asynchronous serial I/O (UART) mode
7.4 Clock asynchronous serial I/O (UART) mode
Table 7.4.1 lists the performance overview in the UART mode, and Table 7.4.2 lists the functions of I/O pins
in this mode.
Table 7.4.1 Performance overview in UART mode
Item
Transfer data
format
Transfer rate
Error detection
Start bit
Character bit (Transfer data)
Parity bit
Stop bit
When selecting internal clock
When selecting external clock
Functions
1 bit
7 bits, 8 bits, or 9 bits
0 bit or 1 bit (Odd or even can be selected.)
1 bit or 2 bits
Clock of BRGi output divided by 16
Maximum 312.5 kbps
4 types (Overrun, Framing, Parity, and Summing)
Presence of error can be detected only by checking error sum flag.
Table 7.4.2 Functions of I/O pins in UART mode
Method of selection
Fixed
Port P8 direction register
✼
1 ’s corresponding bit = “0”
Internal/External clock select bit
✼ 2
= “1”
____ ____
CTS/RTS select bit
✼
3 = “0”
____ ____
CTS/RTS select bit = “1”
Pin name
TxD
i
(P8
3
, P8
7
)
RxD
i
(P8
2
, P8
6
)
CLK
i
(P8
1
, P8
5
)
____ ____
CTS
i
/
RTS
i
(P8
0
, P8
4
)
Functions
Serial data output
Serial data input
BRGi’s count source
input
____
CTS input
____
RTS output
Port P8 direction register
✼
1
: Address 14
16
Internal/External clock select bit
✼
2 : bit 3 at addresses 30
16
, 38
16
____ ____
CTS/RTS select bit
✼
3
: bit 2 at addresses 34
16
, 3C
16
Notes 1: The TxD
i
pin outputs “H” level while not transmitting after selecting UARTi’s operating mode.
2: The RxD
i
pin can be used as a programmable I/O port when performing only transmission.
3: The CLK
i
pin can be used as a programmable I/O port when selecting internal clock.
___ ___ ___
4: The CTS
i
/RTS
i
pin can be used as a input port when performing only reception and not using RTS
___
function (when selecting CTS function).