Renesas 7700 FAMILY, User Manual

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APPENDIX
Appendix 3. Control registers
7751 Group User’s Manual 20–28
Processor mode register 0
Bit Bit name Functions At reset RW
0
1
2
3
4
5
6
7
Processor mode bits
Software reset bit
Interrupt priority detection time
select bits
Clock
1
output select bit
(Note 2)
0
0
0
0
0 0 : Single-chip mode
0 1 : Memory expansion mode
1 0 : Microprocessor mode
1 1 : Not selected
The microcomputer is reset by
writing “1” to this bit. The value is
“0” at reading.
0 0 : 7 cycles of
0 1 : 4 cycles of
1 0 : 2 cycles of
1 1 : Not selected
0 : Clock
1
output disabled
(P4
2
functions as a programmable
I/O port.)
1 : Clock
1
output enabled
(P4
2
functions as a clock
1
out-
put pin.)
0
0
b1 b0
b5 b4
Processor mode register 0 (Address 5E
16
)
(Note 1)
Notes 1: While supplying the Vcc level to the CNVss pin, this bit becomes “1.” (Fixed to “1.”)
2: This bit is ignored in the microprocessor mode. (It may be either “0” or “1.”)
b1 b0 b2 b3 b4 b5 b6 b7
0
RW
RW
Fix this bit to “0.” RW
WO
0
RW
0
RW
Fix this bit to “0.”
RW
RW
0