Renesas 7700 FAMILY, User Manual

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SERIAL I/O
7751 Group User’s Manual
7–13
7.2.6 UARTi baud rate register (BRGi)
The UARTi baud rate register (BRGi) is an 8-bit timer exclusively used for UARTi to generate a transfer
clock. It has a reload register. Assuming that a value set in the BRGi is “n” (n = “00
16
” to “FF
16
”), the BRGi
divides the count source frequency by n + 1.
In the clock synchronous serial I/O mode, the BRGi is valid when an internal clock is selected, and a clock
of which frequency is the BRGi output’s frequency divided by 2 becomes the transfer clock. In the UART
mode, the BRGi is always valid, and a clock of which frequency is the BRGi output’s frequency divided by
16 becomes the transfer clock.
The data which is written to the addresses 31
16
and 39
16
is written to both the timer register and the reload
register whether transmission/reception is stopped or in progress. Accordingly, writing to their addresses,
perform it while that is stopped.
Figure 7.2.10 shows the structure of the UARTi baud rate register (BRGi); Figure 7.2.11 shows the block
diagram of transfer clock generating section.
7.2 Block description
Fig. 7.2.11 Block diagram of transfer clock generating section
BRGi
1/2
Transmit control circuit
Receive control circuit
Transfer clock for transmit operation
Transfer clock for receive operation
Transmit control circuit
Receive control circuit
Transfer clock for transmit operation
Transfer clock for receive operation
BRGi
1/16
<Clock synchronous serial I/O mode>
<UART mode>
f
i
: Clock selected by BRG count source select bits (f
2
/f
4
, f
16
/f
32
, f
64
/f
128
, or f
512
/f
1024
)
f
EXT
: Clock input to CLK
i
pin (external clock)
1/16
f
i
f
EXT
f
EXT
f
i
b7 b0
UART0 baud rate register (Address 31
16
)
UART1 baud rate register (Address 39
16
)
Functions Bit
At reset
RW
7 to 0
Can be set to “00
16
” to “FF
16
.”
Assuming that the set value = n, BRGi
divides the count source frequency by n + 1.
Undefined
WO
Fig. 7.2.10 Structure of UARTi baud rate register (BRGi)