1269 User Manual
Using The Enhanced Monitoring System 4-20
-- Enable Fan Speed
STAT:QUES:FREQ:ENABLE 1
-- Enable all bits of the Questionable Enable Register
STAT:QUES:ENABLE 32767
-- Enable bit 3 of the IEEE-488.2 Status Byte
*SRE 8
When an interrupt is detected by the system controller, it must
check to see which condition generated the condition. To do
this, it must:
1)
Read the Questionable Event Register to see
which attribute caused the interrupt. Recall that
this register is read with the
“STAT:QUES:EVENT?” query.
2)
If the Voltage Summary bit (bit 0) is set, then read
the Questionable Voltage Event Register to
determine which supply Is out of tolerance. The
Questionable Voltage Event Register may be read
with the
“STAT:QUES:VOLT:EVENT?” query.
3)
If the Temperature Summary bit (bit 4) is set, it
must be caused by VXI slot 7 temperature rise,
since that is the only slot enabled in this
example.
4)
If the Frequency Summary bit (bit 5)
i
s set, it is
caused by the fan.
The example enables only a few attributes to generate an
interrupt. For most users, all out-of-tolerance conditions should
be investigated. Therefore, for most users, all of the Enable
Registers should be set to a value of 32767 so all monitored
attributes are capable of generating an interrupt.
Programming The
Trigger Subsystem
The 1269 provides the following trigger capabilities:
1)
Route a signal from the TRIG IN front panel input
connector to one of the TTLTRG lines on the VXI
backplane.
2)
Route a signal from one of the TTLTRG lines on
the VXI backplane to the TRIG OUT front panel
output connecter.
3)
Apply a programmable delay between either the
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com