Qorvo PAC25140, User Manual

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PAC25140 Users Guide Preview
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Rev. 1.0.0 28 February 2023 © 2023 Qorvo US, Inc.
62 of 77
SOC.CFGCB1
Register 8-40
. SOC.CFGCB1 (Configure Cell Balance 1, SOC 0x33)
BIT NAME ACCESS RESET DESCRIPTION
7 VB8 R/W 0x0
Cell 8 Cell Balance
Enable
6 VB7 R/W 0x0
Cell 7 Cell Balance
Enable
5 VB6 R/W 0x0
Cell 6 Cell Balance
Enable
4 VB5 R/W 0x0
Cell 5 Cell Balance
Enable
3 VB4 R/W 0x0
Cell 4 Cell Balance
Enable
2 VB3 R/W 0x0
Cell 3 Cell Balance
Enable
1 VB2 R/W 0x0
Cell 2 Cell Balance
Enable
0 VB1 R/W 0x0
Cell 1 Cell Balance
Enable
SOC.CFGCB2
Register 8-41
. SOC.CFGCB2 (Configure Cell Balance 2, SOC 0x34)
BIT NAME ACCESS RESET DESCRIPTION
7 VB16 R/W 0x0
Cell 16 Cell Balance
Enable
6 VB15 R/W 0x0
Cell 15 Cell Balance
Enable
5 VB14 R/W 0x0
Cell 14 Cell Balance
Enable
4 VB13 R/W 0x0
Cell 13 Cell Balance
Enable
3 VB12 R/W 0x0
Cell 12 Cell Balance
Enable
2 VB11 R/W 0x0
Cell 11 Cell Balance
Enable
1 VB10 R/W 0x0
Cell 10 Cell Balance
Enable
0 VB9 R/W 0x0
Cell 9 Cell Balance
Enable
SOC.CFGCB3
Register 8-42
. SOC.CFGCB3 (Configure Cell Balance 3, SOC 0x35)
BIT NAME ACCESS RESET DESCRIPTION
7:4 RFU R 0x0 Reserved
3 VB20 R/W 0x0
Cell 20 Cell Balance
Enable
2 VB19 R/W 0x0
Cell 19 Cell Balance
Enable
1 VB18 R/W 0x0
Cell 18 Cell Balance
Enable
0 VB17 R/W 0x0
Cell 17 Cell Balance
Enable
SOC.GP
Register 8-43
. SOC.GP (General-Purpose Register, SOC 0x40)
BIT NAME ACCESS RESET DESCRIPTION
7:0 GP RW 0x0
General-purpose
read-write register.