PAC25140 Users Guide Preview
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Peripheral MUX (DPM) may be configured to connect the USART A SPI signals to GPIO A,
where they are connected to the Analog peripherals.
4.3
USART Configuration
USART A acts as a SPI bus master to communicate with the Analog Peripherals. The USART A
signals that are used for this communication are:
▪
USASCLK
–
USART A SPI Clock
▪
USAMOSI
–
USART A Master-Out/Slave-In
▪
USAMISO
–
USART A Master-In/Slave-Out
▪
USASS
–
USART A Slave Select
In order to communicate with the Analog Peripherals, the USART A should have the following
configuration:
▪
8-bit mode
▪
SCLK active high
▪
CPH is sample/setup
▪
SS active low
When communicating with the Analog Peripherals, the maximum SCLK frequency is 25MHz.
4.4
Protocol
The protocol for communicating with the Analog Peripherals is a simple two-byte protocol.
The first byte is always the address, which includes a 7-bit address [7:1] and a write bit [0]. For
write operations, the write bit [0] is set to 1b. For read operations, the write bit [0] is set to 0b.
For write operations, the 2
nd
byte will be the 8-bit data to write to the given address.
For read operations, the 2
nd
byte is ignored and MISO will contain the 8-bit data read from the
given address.
4.5
Write Register Example
To write the
HPDACH
register (address 11h) with the value 28h, issue the following
transactions to USART A:
▪
Write
SSPADAT
with the value 23h (11h << 1 | 1b for write transaction)
▪
Write
SSPADAT
with the value 28h
The timing diagram from a write operation is shown below.
Figure 4-2 Analog Peripheral Register Write Timing
