PAC25140 Users Guide Preview
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Rev. 1.0.0 28 February 2023 © 2023 Qorvo US, Inc.
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7.4
Functional Description
7.4.1 Register Protection
Select registers require the protection address SOC.PROT_KEY be written before the select
registers can be written. Registers that require this will contain a note about writing
PROT_KEY. To enable writing of the protected registers, write SOC.PROT_KEY.KEY with
0xA5, and then write the protected register.
7.4.2 Current Sensing
The PAC25140 contains circuitry for battery pack current sense. The positive terminal, I sense
positive (ISNSP) and negative terminal, I sense negative(ISNSN) are connected to each side of
an external sense resistor. The ISNSP pin is connected to the positive terminal of a differential
amplifier (DA) and the ISNSN pin is connected to the negative terminal of the amplifier. The
differential amplifier has a programmable gain up to x128. This amplifier has a common-mode
range of -0.3V to 0.5V.
The output of the differential amplifier is connected to the 16-bit Sigma-Delta ADC for current
sensing and also to over current protection comparators.
7.4.3 IADC 16-bit Sigma-Delta ADC
The IADC is a 16-bit Sigma-Delta ADC and has an input range of -500mV to +500mV. The
IADC is controlled using SOC.IADCCTL register. Write the SOC.IADCCTL register to set the
Diff Amp gain, select the IMUX setting, and start the IADC conversion. To know if the
conversion is complete, the SOC.IADCCTL.IADCBUSY bit can be polled. The IADCBUSY bit
signal is also routed to the MCU PA3 GPIO, which can be configured to generate an interrupt
based on the IADCBUSY signal.
Differential Amplifier Gain
Use SOC.IADCCTL.DAGAIN to set to gain between 1x to 128x.
Differential Amplifier Reference
The Differential Amplifier reference is 0.5V.
Measuring Current SENSE voltages
The Current SENSE ADC (IADC) is enabled by setting the SOC.SIGMGRCTL2.IADCEN bit.
In order to measure the battery pack current through the SENSE resistor, the IADC multiplexer
must be configured to select the differential output by writing a 0d to the
SOC.IADCTL.IMUXSEL register. Alternatively, the same multiplexer allows the voltage
conversion of the SCP DAC, OCC DAC and OCD DAC.
To start a IADC Conversion, the SOC.IADCCTL.ADCSTART bit must be set to 1d. The read
only bit SOC.VADCCTL.IADCBUSY bit will set to 1d once the conversion is completed. The 16
