PAC25140 Users Guide Preview
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Rev. 1.0.0 28 February 2023 © 2023 Qorvo US, Inc.
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9.1
PAC25xxx Architecture
Figure 9-1 Top Level Block Diagram
P
A
C
S
O
C
B
U
S
Power Application Controller
128kB FLASH
32kB SRAM
CLOCK
CONTROL
RTC/Calendar
GPIO
USART (3)
I2C
CAN
SYSTEM
CONTROL
A
P
B
/A
H
B
PX.Y
DEBUG/
ETM
ARM
CORTEX-M4F
CORE
TIMERS (4)
DEAD TIME
(16)
PWM/CC (32)
PWM ENGINE
BRIDGE
WWDT
DTSE
DATA ACQUISITION
AND SEQUENCER
12-BIT
ADC
M
U
X
3 x 1kB FLASH
PX.Y
PX.Y
PX.Y
PX.Y
PX.Y
AFE
GP TIMER (2)
