131
In the following example, IR 00005, IR 00006, IR 00007, and IR 00008 are
used to control the bits of C used in @SFTR(84). The shift register is be-
tween LR 20 and LR 21, and it is controlled through IR 00009.
00000
LD
00005
00001
OUT
05012
00002
LD
00006
00003
OUT
05013
00004
LD
00007
00005
OUT
00514
00006
LD
00008
00007
OUT
05015
00008
LD
00009
00009
@SFTR(84)
050
LR
20
LR
21
Address
Instruction
Operands
Address
Instruction
Operands
05012
00005
05013
05014
05015
00006
00007
00008
00009
Direction
Status to input
Shift pulse
Reset
@SFTR(84)
050
LR 20
LR 21
5-13-3
ARITHMETIC SHIFT LEFT – ASL(25)
Wd
: Shift word
IR, AR, DM, HR, LR
Ladder Symbols
Operand Data Areas
ASL(25)
Wd
@ASL(25)
Wd
When the execution condition is OFF, ASL(25) is not executed. When the
execution condition is ON, ASL(25) shifts a 0 into bit 00 of Wd, shifts the bits
of Wd one bit to the left, and shifts the status of bit 15 into CY.
1 0 0 1 1 1 0 0 0 1 0 1 0 0 1 1
CY
Bit
00
Bit
15
0
ER:
Indirectly addressed DM word is non-existent. (Content of
*
DM word
is not BCD, or the DM area boundary has been exceeded.)
CY:
Receives the status of bit 15.
EQ:
ON when the content of Wd is 0; otherwise OFF.
Example
Description
Flags
Data Shifting
Section 5-13
