89
execution of all instruction up to the next INTERLOCK CLEAR instruction. If
the execution condition for the INTERLOCK instruction is OFF, all right-hand
instructions through the next INTERLOCK CLEAR instruction will be ex-
ecuted with OFF execution conditions to reset the entire section of the ladder
diagram. The effect that this has on particular instructions is described in
5-11 INTERLOCK and INTERLOCK CLEAR – IL(02) and ILC(03) .
Diagram B can also be corrected with an interlock. Here, the conditions lead-
ing up to the branching point are placed on an instruction line for the INTER-
LOCK instruction, all of lines leading from the branching point are written as
separate instruction lines, and another instruction line is added for the IN-
TERLOCK CLEAR instruction. No conditions are allowed on the instruction
line for INTERLOCK CLEAR. Note that neither INTERLOCK nor INTER-
LOCK CLEAR requires an operand.
Instruction 1
00002
00000
Instruction 2
00001
ILC(03)
IL(02)
Address
Instruction
Operands
00000
LD
00000
00001
IL(02)
---
00002
LD
00001
00003
Instruction 1
00004
LD
00002
00005
Instruction 2
00006
ILC(03)
---
If IR 00000 is ON in the revised version of diagram B, above, the status of IR
00001 and that of IR 00002 would determine the execution conditions for in-
structions 1 and 2, respectively. Because IR 00000 is ON, this would produce
the same results as ANDing the status of each of these bits. If IR 00000 is
OFF, the INTERLOCK instruction would produce an OFF execution condition
for instructions 1 and 2 and then execution would continue with the instruc-
tion line following the INTERLOCK CLEAR instruction.
As shown in the following diagram, more than one INTERLOCK instruction
can be used within one instruction block; each is effective through the next
INTERLOCK CLEAR instruction.
Instruction 1
00000
Instruction 2
00001
ILC(03)
IL(02)
00004
Instruction 3
Instruction 4
00006
00005
00003
00002
IL(02)
Address
Instruction
Operands
00000
LD
00000
00001
IL(02)
---
00002
LD
00001
00003
Instruction 1
00004
LD
00002
00005
IL(02)
---
00006
LD
00003
00007
AND NOT
00004
00008
Instruction 2
00009
LD
00005
00010
Instruction 3
00011
LD
00006
00012
Instruction 4
00013
ILC(03)
---
If IR 00000 in the above diagram is OFF (i.e., if the execution condition for
the first INTERLOCK instruction is OFF), instructions 1 through 4 would be
executed with OFF execution conditions and execution would move to the
instruction following the INTERLOCK CLEAR instruction. If IR 00000 is ON,
the status of IR 00001 would be loaded as the execution condition for instruc-
Inputting, Modifying, and Checking the Program
Section 4-6
