NEC V850E/IA1 mPD703116, User Manual

Page: 719 / 832

CHAPTER 14 PORT FUNCTIONS
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User’s Manual U14492EJ3V0UD
(1) Timer 2 input filter mode registers 0 to 5 (FEM0 to FEM5)
The FEMn registers are used to specify timer 2 input pin filtering and to set the clock source of noise
elimination times and the input valid edge.
These registers can be read/written in 8-bit or 1-bit units.
Cautions 1. Even when using the TI2/INTP20, TO21/INTP21, TO22/INTP22, TO23/INTP23,
TO24/INTP24, and TCLR2/INTP25 pins as INTP20, INTP21, INTP22, INTP23, INTP24, and
INTP25 without using timer 2, be sure to clear the STFTE bit of timer 2 clock stop
register 0 (STOPTE0) to 0.
2. Before setting the INTP2n pin to the trigger mode, set the PMC2 register. If the PMC2
register is set after the FEMn register has been set, an illegal interrupt may occur as
soon as the PMC2 register is set (n = 0 to 5).
(1/2)
7
DFEN00 FEM0
6
0
5
0
4
0
3
EDGE010
2
EDGE000
1
TMS010
0
TMS000
Address
FFFFF630H
Initial value
00H
Address
FFFFF631H
Initial value
00H
Address
FFFFF632H
Initial value
00H
Address
FFFFF633H
Initial value
00H
Address
FFFFF634H
Initial value
00H
Address
FFFFF635H
Initial value
00H
INTP20
7
DFEN01
6
0
5
0
4
0
3
EDGE011
2
EDGE001
1
TMS011
0
TMS001
INTP21
7
DFEN02
6
0
5
0
4
0
3
EDGE012
2
EDGE002
1
TMS012
0
TMS002
INTP22
7
DFEN03
6
0
5
0
4
0
3
EDGE013
2
EDGE003
1
TMS013
0
TMS003
INTP23
7
DFEN04
6
0
5
0
4
0
3
EDGE014
2
EDGE004
1
TMS014
0
TMS004
INTP24
7
DFEN05
6
0
5
0
4
0
3
EDGE015
2
EDGE005
1
TMS015
0
TMS005
INTP25
FEM1
FEM2
FEM3
FEM4
FEM5
Bit Position Bit Name Function
7 DFEN0n Specifies the INTP2n pin filter.
0: Analog filter
1: Digital filter
Caution When the DFEN0n bit = 1, the sampling clock of the digital filter is f
XXTM2
(clock of TM20 and TM21 selected by PRM02 register).
Remark n = 0 to 5