CHAPTER 13 A/D CONVERTER
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User’s Manual U14492EJ3V0UD
13.9 Operation in External Trigger Mode
In external trigger mode, analog input (ANI00 to ANI07, ANI10 to ANI17) is A/D converted on ADTRG0 or ADTRG1
pin input timing.
The valid edge of an external input signal in external trigger mode can be specified as a rising edge, a falling edge,
or a rising or falling edge in the ES21 or ES20 bit of the INTM1 register for A/D converter 0 and in the ES31 or ES30
bit of the INTM1 register for A/D converter 1.
13.9.1 Operation in select mode
One analog input (ANI00 to ANI07, ANI10 to ANI17) specified by the ADSCM00 or ADSCM10 register is A/D
converted. The conversion result is stored in the ADCR0n or ADCR1n register (n = 0 to 7).
Using an ADTRG0 or ADTRG1 signal as a trigger, one analog input at a time is A/D converted and the result is
stored in one ADCR0n or ADCR1n register. Analog inputs correspond one-to-one with A/D conversion result
registers. For each A/D conversion, an A/D conversion termination interrupt (INTAD0 or INTAD1) is generated, which
terminates A/D conversion (ADCS0 or ADCS1 bit = 0).
Trigger
Analog Input
A/D Conversion Result Register
ADTRGm signal
ANImn
ADCRmn
Remark
m = 0, 1
n = 0 to 7
To restart A/D conversion, a trigger must be input again from the ADTRGn pin (n = 0, 1).
This is optimal for applications that read results each time there is an A/D conversion in synchronization with an
external trigger.
Figure 13-12. Example of Select Mode (External Trigger Select) Operation (ANI02): For A/D Converter 0
ANI00
ANI01
ANI02
ANI03
ANI04
ANI05
ANI06
ANI07
ADCR00
ADCR01
ADCR02
ADCR03
ADCR04
ADCR05
ADCR06
ADCR07
A/D converter 0
ADTRG0
(1) ADCE0 bit of ADSCM00 = 1 (Enabled)
(2) External trigger generation
(3) A/D conversion of ANI02
(4) Store conversion result in ADCR02
(5) INTAD0 interrupt generation
