Mitsubishi Q2ACPU, User Manual

Page: 81 / 570

7 - 3
7. AUTO REFRESH FUNCTION
(1) Parameter setting items, setting ranges and contents of auto refresh, as well as the
buffer memory address of the master module which is used for exchanging data with
the QnACPU are shown below.
Set the parameters for the number of the master modules used.
I/O signal
from a
master
module
Buffer memory
address of a
master module
Item Setting range Description Default value
– –
Number of
master
modules
0, 1 to 8 module(s)
• Sets the total number of the master modules used.
Set "0" if auto refresh is not to be used.
Follow the
settings
made in the
"I/O Assign"
in the
parameter
mode.
*3
– – Start I/O No.
Number of I/O points of CPU
module • Sets the head I/O number where the master module
is installed.
– –
Model
classification
of MINI/MINI-
S3
• MINI or MINI-S3
• MINI
In I/O mode (occupies 32 points)
• MINI-S3
In expansion mode (occupies 48 points)
– 0
Total number
of remote I/O
stations
0 to 64 stations
• Set only when MINI is set.
• In MINI-S3, since the number of master module's
initial ROMs becomes valid, the setting is not
necessary .(When the setting is executed, ignore it).
–
110
to
141
Storage
device for
received data
*4
• X
• M, L, B, T, ST, C, D, W, R, ZR,
none
(Bit device: multiples of 16)
• Sets the devices to store the received/send data for
batch refresh.
• Specify the head number of the device.
• The total number of remote I/O stations, set starting
from the first device number, is occupied as a auto
refresh area.
(8 points/station 64 stations = 512 points
: Bit
device)
*2
• Use of X/Y remote I/O range is recommended for
devices.
X1000 to
X11FF
–
10
to
41
Send data
storage
device
• Y
• M, L, B, T, ST, C, D, W, R, ZR,
none
(Bit device: multiples of 16)
Y1000 to
Y11FF
– 1
Number of
retries
0 to 32 times
• Sets the number of retries upon the communication
errors occurrence.
• Error is not output when the communication is
restored within the number of the retries set.
5 times
Y(n+1A) *1 –
FROM/TO
response
specification
Link priority; CPU priority
Priority selection of access
to the master module
buffer memory
1) Link priority
• Link access by MINI-S3 has the priority.
During the link access, FROM/TO is caused to wait.
• Possible to read out the received data refreshed at
the same timing.
• The maximum wait time (0.3ms + 0.2ms number
of separate refresh stations) for the FROM/TO
instruction may be generated.
2) CPU priority
• The FROM/TO instructions from a CPU module are
given access priority. Even during the link access, it
interrupts and accesses.
• Depending on the timing, received data in the midst
of I/O refresh may be read.
• No wait time for the FROM/TO instruction.
CPU priority
Y(n+1B)
*1 –
Data clear
specification
for
communication
faulty station
Retention, clear (received data)
• Retention
Retains the received data for batch and separate
refresh.
• Clear
Sets all points to OFF
Clear