190
10 BLOCK LINK EXAMPLES
10.6 Fixed Cycle Output
10.6
Fixed Cycle Output
One pulse is output from the multi function counter block at specified cycle time.
The following describes a link and parameter example of a fixed cycle output. With the example setting, when a rise of the
input signal 0 is detected, output of the following fixed cycle pulse starts, and when a rise of the input signal 1 is detected, the
output stops. Note that this link example is for when a 32-bit unsigned multi function counter block is used.
Link and parameter
The following shows a link example of the hardware logic outline window and a link example and parameter setting example
of the multi function counter block detail window.
■
Hardware logic outline window
1000ms
ON
OFF
1000ms
Cycle time
External output signal
Fixed cycle output
start signal
Fixed cycle output
stop signal
Fixed cycle pulse
output
Summary of Contents for MELSEC-L Series LD40PD01
Page 2: ......
Page 9: ...7 MEMO ...
Page 24: ...22 2 PART NAMES MEMO ...
Page 35: ...4 PROCEDURES BEFORE OPERATION 33 4 MEMO ...
Page 263: ......