Workstation 5 Field Service Guide
2-7
Workstation 5 System Board Technical Descriptions
LX800 Processor and TFT Controller
PCI Bus Interface Block
The PCI Bus Interface provides a protocol conversion layer between the
transaction forwarding block and the PCI bus. The master and target
portions of this block operate independently.
The PCI Bus Interface Block implements the logic to generate PCI
configuration cycles. The standard mechanism for generating PCI
Configuration cycles (as described in the PCI 2.2 Specification) is used.
PCI Bus Arbiter
The PCI Arbiter implements a fair arbitration scheme with special support
for the CD5536 companion device. By default it operates as a simple round
robin arbiter that rotates three request/grant priorities in a circular fashion.
GeodeLink Interface General Description
The GeodeLink Interface is a non-traditional high bandwidth packetized
uni-directional bus for internal peripherals. The GeodeLink architecture
connects the internal modules of the LX800 and companion device using
the data ports defined by GeodeLink Interface Units. Transactions between
GeodeLink Devices and the GLIU are conducted with packets.
The GLIU accepts request packets from masters and routes them to slaves.
Similarly, slave response packets are routed back to the master. The bus is
non-blocking. Several requests can be pending, but order is not guaranteed.
All packets have one source and one destination, broadcasts are not
allowed.
The existence of the GeodeLink architecture is generally invisible to the
user or even a system programmer. All GeodeLink initialization and
support is handled at the BIOS level, and additionally provides a Virtual
PCI Configuration Space to abstract the GeodeLink architecture to
industry standard interfaces. Through the Virtual PCI Configuration Space,
all GeodeLink devices appear in one PCI multi-function configuration
space header on the external PCI bus.
